AADesign Guide for ICE2PCSxxApp

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Design Guide for Boost Type CCM PFC with ICE2PCSxx
Boost 类型 CCM PFC 的设计指南与 ICE2PCSxx

Application note, Ver 1.0, May 2008

Edition 2008-08-01 Published by Infineon Technologies Asia Pacific, 168 Kallang Way, 349253 Singapore, Singapore © Infineon Technologies AP 2005. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Edition 2008-08-01 由 Infineon Technologies Asia Pacific 发行，地址：新加坡 新加坡 168 Kallang Way, 349253 © Infineon Technologies AP 2005. 保留所有权利。请注意！此处提供的信息旨在描述某些组件，不应被视为对其特性的保证。保留交货条件和技术更改的权利。我们在此声明，对于电路、描述和图表中所述的内容，不承担任何担保责任，包括但不限于不侵权担保。信息 如需了解技术详情、交货条件和价格，请联系您附近的 Infineon Technologies 办公室（www.infineon.com）。警告 由于技术要求，组件中可能含有危险物质。如需了解相关类型的信息，请联系您附近的 Infineon Technologies 办公室。 Infineon Technologies 的组件仅在以下情况下可以用于生命支持设备或系统：Infineon Technologies 以书面形式明确批准的情况下，如果这些组件的故障可以合理预期会导致生命支持设备或系统的故障，或者影响该设备或系统的安全性和有效性。生命支持设备或系统旨在植入人体内，或支持、维持和保护人的生命。如果它们发生故障，可以合理假设用户的健康或他人的健康可能会受到威胁。

Revision History: 2008-08 V1.0 Previous Version: none Page Subjects (major changes since last revision) Design Guide for Boost Type CCM PFC with ICE2PCSxx License to Infineon Technologies Asia Pacific Pte Ltd AN-PS0029 Liu Jianwei Luo Junyang Jeoh Meng Kiat We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: mailto:ap-lab.admin@infineon.com
修订历史：2008-08 V1.0 之前版本：无 页面主题（自上次修订以来的主要更改） Boost 型 CCM PFC 设计指南（ICE2PCSxx） 许可证授予英飞凌科技亚太私人有限公司 AN-PS0029 刘建伟 罗 Junyang 李孟凯 我们倾听您的意见 您认为本文件中的任何信息有误、不清楚或缺失吗？您的反馈将帮助我们不断改进此文件的质量。请将您的建议（包括本文件的引用）发送至：mailto:ap-lab.admin@infineon.com

ICE2PCSxx Table of Contents Page Application Note 4 2008-08-01
ICE2PCSxx 目录 页面 应用说明 4 2008-08-01

1 Introduction ...................................................................................................................................5
1 介绍 ...................................................................................................................................5

2 Boost PFC design with ICE2PCXX ..............................................................................................7 2.1 Target specification .........................................................................................................................7 2.2 Bridge rectifier .................................................................................................................................7 2.3 Power MOSFET and Gate Drive Circuit .........................................................................................7 2.4 Boost Diode.....................................................................................................................................8 2.5 Boost inductor .................................................................................................................................9 2.6 AC line current filter.......................................................................................................................11 2.7 Boost Output Bulk Capacitance ....................................................................................................12 2.8 Current Sense Resistor.................................................................................................................12 2.9 Output voltage sensing divider......................................................................................................13 2.10 Frequency setting (only for ICE2PCS01)......................................................................................13 2.11 AC Brown-out Shutdown (only for ICE2PCS02)...........................................................................14 2.12 IC supply .......................................................................................................................................15 2.13 PCB layout guide ..........................................................................................................................16
2 Boost PFC 设计与 ICE2PCXX ..............................................................................................7 2.1 目标规范 .........................................................................................................................7 2.2 桥式整流器 .........................................................................................................................7 2.3 功率 MOSFET 和栅极驱动电路 .........................................................................................7 2.4 Boost 二极管.....................................................................................................................................8 2.5 Boost 电感 .................................................................................................................................9 2.6 交流线路电流滤波器...................................................................................................................11 2.7 Boost 输出电容 ....................................................................................................................12 2.8 电流检测电阻器.................................................................................................................12 2.9 输出电压分压器......................................................................................................13 2.10 频率设置（仅适用于 ICE2PCS01）......................................................................................13 2.11 交流欠压关断（仅适用于 ICE2PCS02）...........................................................................14 2.12 IC 供电 .......................................................................................................................................15 2.13 PCB 布局指南 ........................................................................................................................16

3 Voltage loop and current loop compensation..........................................................................17 3.1 How to achieve PFC function without sinusoidal reference sensing ............................................18 3.2 Current Loop Regulation and Transfer Function...........................................................................19 3.3 Voltage Loop Compensation.........................................................................................................22 3.4 Design Example ............................................................................................................................28 3.5 Vcomp and M1, M2 value at full load condition ............................................................................29
3 电压环和电流环补偿..........................................................................17 3.1 如何在无需正弦参考检测的情况下实现 PFC 功能 ............................................18 3.2 电流环调节和传递函数...........................................................................19 3.3 电压环补偿.........................................................................................................22 3.4 设计实例 ............................................................................................................................28 3.5 全载况下的 Vcomp 和 M1、M2 值 ............................................................................29

Application Note 5 2008-08-01

Abstract
摘要

ICE2PCS01/02 are the 2 nd generation of Continuous Conducti on Mode (CCM) PFC controllers, which employ BiCMOS technology. Its control scheme does not ne ed the direct sine-wave sensing reference signal from the AC mains compared to the conv entional PFC solution. Average current control is implemented to achieve the unity power factor. In this application note, the design process for the boost PFC with ICE2PCXX is presented and the design details for a 300W output power PFC with the universal input voltage range of 85~265VAC are included.
ICE2PCS01/02 是连续导通模式(CCM)PFC 控制器的第二代产品，采用 BiCMOS 技术。其控制方案不需要像传统 PFC 解决方案那样直接从交流电源获取正弦波检测参考信号。采用平均电流控制来实现单位功率因数。在本应用说明中，介绍了使用 ICE2PCXX 的升压 PFC 的设计过程，并包括了适用于 85~265VAC 通用输入电压范围、输出功率为 300W 的 PFC 的设计细节。

1 Introduction
1 介绍

The Pin layout of ICE2PCS01 and ICE2PCS02 is shown in Figure 1.
ICE2PCS01 和 ICE2PCS02 的 Pin 布局如图 1 所示。

1 6

7 8 4

3

2 5

GATEGND ICOMP ISENSE

VCC

VSENSE FREQ VCOMP

1 6

7 8 4

3

2 5

GATEGND ICOMP ISENSE

VCC

VSENSE VINS VCOMP

ICE2PCS01 ICE2PCS02 Figure 1 Pin Layout of ICE2PCS01 and ICE2PCS02 From the layout, it can be seen that most of Pins in ICE2PCS02 are the same as ICE2PCS01 except Pin 4. In ICE2PCS01, Pin 4 is to set the switching frequency. However, for ICE2PCS02, Pin 4 is for AC brown out detection and the switching frequency is fixed by internal oscillator at 65kHz. The typical application circuits of ICE2PCS01 and ICE2PCS02 are shown in Figure 2 and Figure 3 respectively.
ICE2PCS01 ICE2PCS02 Figure 1 Pin Layout of ICE2PCS01 and ICE2PCS02 从布局可以看出，ICE2PCS02 的大部分引脚与 ICE2PCS01 相同，除了引脚 4。在 ICE2PCS01 中，引脚 4 用于设置切换频率。然而，在 ICE2PCS02 中，引脚 4 用于 AC 欠压检测，切换频率由内部振荡器固定为 65kHz。ICE2PCS01 和 ICE2PCS02 的典型应用电路分别如图 2 和图 3 所示。

Application Note 6 2008-08-01

Figure 2 Typical application circuit of ICE2PCS01 Figure 3 Typical application circuit of ICE2PCS02
Figure 2 ICE2PCS01 典型应用电路图 Figure 3 ICE2PCS02 典型应用电路图

L1

T1

R1

R2

C OUT

RSENSE

EMI Filter
EMI 滤波器

R3

GATE GND VSENSE ISENSE

C1 C2 R4 C3

VCOMP VINS ICOMP

VCC Auxiliary Supply ICE2PCS02
VCC 辅助供电 ICE2PCS02

Rectifier
整流器

VIN=85V ...265V AC

V OUT=400VDC

C4 R6

R5

D 2

D1

L1

T1

R1

R2

C OUT

RSENSE

EMI Filter
EMI 滤波器

R3

GATE GND VSENSE ISENSE

C1 C2 R4 C3

VCOMP FREQ ICOMP

VCC Auxiliary Supply ICE2PCS01
VCC 辅助供电 ICE2PCS01

Rectifier
整流器

VIN=85V ...265V AC

R FREQ

V OUT =400VDC

D1

Application Note 7 2008-08-01

2 Boost PFC design with ICE2PCXX
2 Boost PFC 设计与 ICE2PCXX

2.1 Target specification
2.1 目标规范

The fundamental electrical data of the circuit are the input voltage range Vin, the output power Pout, the output voltage Vout, the operating switching frequency f SW and the value of the high frequency ripple of the AC line current I ripple. Table 1 shows the relevant values for the system calculated in this Application Note. The efficiency at rated output power Pout is estimated to 91 % over the complete input voltage range. Input voltage 85VAC~265VAC
The fundamental electrical data of the circuit are the input voltage range Vin, the output power Pout, the output voltage Vout, the operating switching frequency fSW and the value of the high frequency ripple of the AC line current Iripple. 表 1 显示了在本应用说明中计算的相关值。在额定输出功率 Pout 的情况下，效率估计为 91%在整个输入电压范围内。输入电压 85VAC~265VAC

Input frequency 50Hz
输入频率 50Hz

Output voltage and current 390VDC, 0.76A
输出电压和电流 390VDC，0.76A

Output power 300W
输出功率 300W

Efficiency >90% at full load
效率 >90% 在满载时

Switching Frequency 65kHz
开关频率 65kHz

Maximum Ambient temperature around PFC 70ºC Table 1 Design parameter for the proposed design
最大环境温度约为 PFC 70ºC 表 1 提出的设计参数

2.2 Bridge rectifier
2.2 桥式整流器

In order to obtain 300W output power at 85 V minimum AC input voltage, the maximum input RMS current is
为了在 85 V 最小交流输入电压下获得 300W 输出功率，最大输入 rms 电流是

AV PI

in

out RMSin 92.3%9085 300

min_ _ =⋅=⋅= η (1) and the sinusoidal peak value of AC current is AII RMSinpkin 54.592.322 __ =⋅=⋅= (2) For these values a bridge rectifier with an average current capability of 6A or higher is a good choice. Please note here, that due to a power dissipation of approximately WAVIVP RMSinFBR 84.792.3122 _ =⋅⋅=⋅⋅= (3) the rectifier bridge should be connected to an appropriate heatsink. Assuming a maximum junction temperature T Jmax of 125°C, a maximum ambient temperature T Amax of 70°C, the thermal junction-to-case RthJC of approximate 2.5 K/W and the thermal case to heatsink R thCHS of approximate 1K/W, the heatsink must have a maximum thermal resistance of
min_ _ =⋅=⋅= η (1) 和交流电流的正弦峰值为 AII RMSinpkin 54.592.322 __ =⋅=⋅= (2) 对于这些值，一个平均电流能力为 6A 或更高的桥式整流器是一个不错的选择。请注意，由于功率损耗约为 WAVIVP RMSinFBR 84.792.3122 _ =⋅⋅=⋅⋅= (3)，整流桥应连接到适当的散热器。假设最大结温 T Jmax 为 125°C，最大环境温度 T Amax 为 70°C，结温到壳温的热阻 RthJC 约为 2.5 K/W，壳温到散热器的热阻 R thCHS 约为 1 K/W，散热器的最大热阻必须为

WKRRP TTR thCHSthJC BR

AJ BRthHS /52.315.284.7 70125 maxmax _ =−−−=−−−= (4)

2.3 Power MOSFET and Gate Drive Circuit
2.3 功率 MOSFET 和栅极驱动电路

Due to the switch mode operation, the loss is only valid during the on-time of the MOSFET. The duty cycle of the transistor in boost converters operating in CCM at minimum AC input RMS voltage is
由于开关模式操作，损失仅在 MOSFET 的导通时间内有效。在最小 AC 输入有效值电压下，升压转换器中晶体管在临界连续模式下的占空比是

782.0390 8511 min_ =−=−=

out

in on V VD (5)

Application Note 8 2008-08-01

Since rms-values have the same effect on a system as DC-values, it is possible to calculate a characteristic duty cycle for the rms-value. Therefore, the on-state loss of the MOSFET in CCM-mode at a junction- temperature of 125°C is
由于 rms 值对系统的影响与直流值相同，因此可以计算 rms 值的特征占空比。因此，当结温为 125°C 时，MOSFET 在 CCM 模式下的导通状态损耗是

)125( 2 _ CdsononRMSincond RDIP ⋅⋅= (6) the MOSFET switching loss can be estimated as
)125( 2 _ CdsononRMSincond RDIP ⋅⋅= (6) 晶体管开关损耗可以估算为

SWoffonSW fEEP ⋅+= )( (7) where, Eon and E off are the switch-on and switch-off energy loss which can be found in MOSFET datasheet, fSW is the switching frequency. For 300W design, if SPP20N60C3 is used, the conduction loss is WP cond 05.542.0782.092.3 2 =⋅⋅= assuming the switching current is about 6A and gate drive resistance Rg=3.6Ω , then the switching loss is WkHzmWsmWsP SW 43.165*)015.0007.0( = += the total loss is WPPP SWcondtotalMOS 48.6 _ =+= (8) the required heatsink for the MOSFET is
SWoffonSW fEEP ⋅+= )( (7) 其中，Eon 和 Eoff 是开关接通和开关断开的能量损失，可以在 MOSFET 数据表中找到，fSW 是开关频率。对于 300W 设计，如果使用 SPP20N60C3，导通损耗是 WP cond 05.542.0782.092.3 2 =⋅⋅= 假设开关电流约为 6A，栅极驱动电阻 Rg=3.6Ω，那么开关损耗是 WkHzmWsmWsP SW 43.165*)015.0007.0( = += 总损耗是 WPPP SWcondtotalMOS 48.6 _ =+= (8) 所需的散热器尺寸为

WKRRP TTR thCHSMOSthJC totalMOS

AJ MOSthHS /89.616.048.6 70125 _ _

maxmax _ =−−−=−−−= (9)

thCHS R is the Rth of the insulation pad between MOSFET and heatsink. Gate drive resistance is used to drive MOSFET as fast as possible but also keep dv/dt within EMI specification. In this 300W example, 3.6Ω gate resistor is chosen for SPP20N60C3 MOSFET. Beside gate drive resistance, one 10k Ω resistor is also commonly connected between MOSFET gate and source to discharge gate capacitor.
thCHS R 是第 R 个绝缘垫片，位于 MOSFET 和散热器之间。栅极驱动电阻用于尽可能快地驱动 MOSFET，同时保持 dv/dt 在 EMI 规范范围内。在 300W 的示例中，选择了 3.6Ω的栅极电阻用于 SPP20N60C3 MOSFET。除了栅极驱动电阻外，还通常连接一个 10kΩ的电阻在 MOSFET 的栅极和源极之间以放电栅极电容。

2.4 Boost Diode
2.4 提升二极管

The boost diode D1 has big influence on the system’s performance due to the reverse recovery behaviour. So the Ultra-fast diode with very low t rr and Q rr is necessary to reduce the switching loss. The new diode technology of silicon carbide (SiC ) Schottky shows its out standing performance with almost no reverse recovery behaviour. The switching loss due to the boost diode can be ignored with SiC Schottky diode. Only conduction loss is calculated as below. WAVDIVP onRMSinFdiode 71.1)782.01(92.32)1( _ = − ⋅ ⋅=−⋅⋅= (10) To decide the current rating of a SiC diode, there is a rule of thumb - the SiC diode can handle output power Pout of 100 W to120 W in a CCM-PFC-system per one rated ampere. For exampl e, the SDT04S60 from Infineon Technologies is rated at a forward current IF = 4 A, so it is capable for a system of Pout = 4*100 W = 400 W system in minimum. Therefore, this diode should be suitable for the proposed design. The required heatsink for boost diode is
增强二极管 D1 对系统性能有很大影响，主要是由于其反向恢复行为。因此，需要使用反向恢复时间 t_rr 和反向恢复电荷 Q_rr 非常低的超快速二极管来减少开关损耗。碳化硅（SiC）肖特基二极管的新技术显示了出色的表现，几乎没有反向恢复行为。使用碳化硅肖特基二极管时，由于增强二极管引起的开关损耗可以忽略不计。只有导通损耗计算如下：WAVDIVP onRMSinFdiode 71.1)782.01(92.32)1( _ = − ⋅ ⋅=−⋅⋅= (10) 选择碳化硅二极管的电流额定值有一个经验法则——在连续导通模式-PFC 系统中，每安培额定值可以处理输出功率 Pout 为 100 W 到 120 W。例如，Infineon Technologies 的 SDT04S60 额定正向电流 IF = 4 A，因此它可以支持最小输出功率 Pout = 4*100 W = 400 W 的系统。因此，这种二极管适合所提议的设计。所需散热器对于增强二极管是

WKRRP TTR thCHSdiodethJC diode

AJ diodethHS /06.2711.471.1 70125 _ maxmax _ =−−−=−−−= (11)

Application Note 9 2008-08-01

The SiC boost diodes often have a poor surge current handling capability. Therefore a so called bypass diode is necessary such as the diode D3 as Figure 4. For the proposed system, 1N5408 is suitable.
SiC boost 整流二极管 often 有 较差 的 过冲 电流 承载 能力。 因此 必须 有一个 所谓 的 绕道 二极管 ， 例如 图 4 中 的 二极管 D3。 对于 提出 的 系统 ， 1N5408 是 适合 的。

L1

T1

R1

R2

COUT

RSENSE

Rectifier
整流器

D1

D3

Figure 4 inrush current bypass diode
Figure 4 冲击电流旁路二极管

2.5 Boost inductor
2.5 倍增压电感

The peak current that the inductor must carry is the peak line current at the lowest input voltage plus the high frequency ripple current. The high frequency ripple current peak to peak, I HF, can be related to maximum input power and minmum input voltage as equation below.
电感必须承载的峰值电流是最低输入电压下的峰值线电流加上高频纹波电流。高频纹波电流的峰峰值 IHF 可以使用最大输入功率和最小输入电压来表示，如下方的方程所示。

min_

max_ 2

in

in HF V PkI ⋅⋅= (12) Where, k must be kept reasonably small, and is usua lly optimized in the range of 15% to 25% for cost effective design based on the current magnetic component status. If k is too high, the larger AC input filter is required to filter out this ripple noise. If k is too low, the value of the inductance is too large and leads to big size of the magnetic core. For example, we choose k = 22%, then,
in HF V PkI ⋅⋅= (12) 其中，k 必须保持在相对较小的范围内，并且通常在 15% 到 25% 的范围内进行优化，以实现成本有效的设计，基于当前的磁性组件状态。如果 k 过高，需要更大的交流输入滤波器来滤除这种纹波噪声。如果 k 过低，电感值会太大，导致磁芯体积增大。例如，我们选择 k = 22%，然后，

AV PI

in

in HF 2.12%22

min_

max_ =⋅⋅= The peak current passing through inductor is
max_ =⋅⋅= 通过电感的峰值电流是

AIII HF peakinpkL 14.62 2.154.52 __ =+=+= (13) The boost choke inductance must be

SWHF

out boost fI VDDL ⋅ ⋅−⋅≥ )1( (14)

D=0.5 will generate the maximum value for the above equation.
D=0.5 将生成上述方程的最大值。

mHkH z A VL boost 25.1652.1 390)5.01(5.0 =⋅ ⋅−⋅≥ The magnetic core of the boost choke can be either magnetic powder or ferrite material. (1) sendust powder toroid core The required effective magnetic volume of the core, Ve, is
mHkH z A VL boost 25.1652.1 390)5.01(5.0 =⋅ ⋅−⋅≥ 磁芯可以是磁粉或铁氧体材料。(1) sendust 粉末环形磁芯 核心的有效磁体积 Ve 需要

Application Note 10 2008-08-01

3322 max

_ 0 6.1166.11)8.0 14.6(25.16257.1125)( cmmeT AmHeB ILV pkL boostre =−=⋅−⋅=≥ µµ (15)

where, r µ is the relative permeability of the material. It should be noted that r µ changes with different DC magnetizing force H, and so does the inductance. As an example, Figure 5 illustrates the relationship between the Percent Permeability and the DC Magnetizing Force H.
where, r µ 是材料的相对 permeability。应该注意的是，r µ 随不同的直流磁化力 H 而变化，电感也是如此。例如，图 5 揾示了相对 permeability 和直流磁化力 H 之间的关系。

0 µ in (15) is the magnetic field constant which is equal to 1.257e-6; B max is the maximum magnetic flux density for the selected magnetic material (for sendust, Bmax is up to 0.8T.)
0 µ ın (15) 是磁常数，等于 1.257e-6；Bmax 是所选磁性材料的最大磁通密度（对于渗磁钢，Bmax 可达 0.8T。）

Figure 5 Percent Permeability and DC Magnetizing Force H (from Changsung) Select a core with similar Ve value from the mag netic core datasheet. For example, the core type CS468125 from Chang Sung Corporation is selected. The parameters of CS468125 are V e=15.584cm3, Ae=1.34cm2, C=11.63cm, r µ =125. The turn number of the boost choke winding is
Figure 5 孔隙率和直流磁化力 H（来自昌盛） 从磁芯数据表中选择一个具有类似 Ve 值的磁芯。例如，昌盛公司生产的磁芯类型 CS468125 被选择。CS468125 的参数为 Ve=15.584cm³，Ae=1.34cm²，C=11.63cm，r µ =125。升压扼流圈绕组的匝数是

83

0 _ =⋅=

er

boost boosttoroid A CLN µµ (16)

where, C is the magnetic path length and Ae is the effective magnetic cross section area. To check the actual r µ at low line, maximum power, the DC Magnetizing Force H is calculated
where, C 是磁路长度，Ae 是有效磁截面积。为了检查低线圈电流下的实际 r µ，最大功率时的直流磁化磁场强度 H 被计算。

)(50 _ OeC NIH pkin ==

Application Note 11 2008-08-01

Then r µ = 125 * 50% = 62.5 according to Figure 5. The actual inductance can be re-calculated as
Then r µ = 125 * 50% = 62.5 根据图 5。实际电感可以重新计算为

mHC ANL er boost 625.0 0 2 == µµ . Hence, the corresponding ripple current will be higher than the previously assumed value. The copper loss of the winding wire can be calculated on Iin_RMS.
mHC ANL er boost 625.0 0 2 == µµ . 因此，相应的纹波电流将高于先前假设的值。可以按照 Iin_RMS 计算绕组铜损。

boostLRMSinboostL RIP _ 2 __ ⋅= (17) Select the proper wire type to fullfil the loss and thermal requirement for the choke. (2) ferrite core To make sure the ferrite core will not go into saturation, the turn number of the boost choke winding with ferrite core is
boostLRMSinboostL RIP _ 2 __ ⋅= (17) 选择合适的导线类型以满足扼流圈的损耗和热要求。 (2) 铁氧体芯 为了确保铁氧体芯不会饱和，带有铁氧体芯的升压扼流圈绕组的匝数是

minmax

_ _ AB LIN boostpkL boostferrite ⋅ ⋅≥ (18) where, Bmax is up to 0.3T according to ferrite material specification; A min is the minimum magnetic cross section area. The winding wire copper loss calculation is the same as in the above section of sendust powder toroid core.
_ _ AB LIN boostpkL boost 铁氧体 ⋅ ⋅≥ (18) 其中，Bmax 根据铁氧体材料规格最高为 0.3T；Amin 是最小磁截面积。绕组铜线损耗计算与上文所述的送粉铁芯相同。

2.6 AC line current filter
2.6 AC 线路滤波器

As decribed in section 2.5, there is high frequency ripple current peak to peak I HF passing through boost choke. This ripple will also go into AC line power net work. The current filter is necessary to reduce the amplitude of high frequency current component. The filt ering circuit consists of a capacitor and an inductor as shown in Figure 6.
如第 2.5 节所述，存在高频纹波电流峰值 I_HF 通过升压电感。这种纹波也会进入交流线路电源网络。为了降低高频电流分量的幅度，需要使用滤波器。滤波电路由一个电容和一个电感组成，如图 6 所示。

Current Filter
当前过滤条件

Rectifier
整流器

VIN=85V ...265VAC

Lfilter Cfilter

IHF IHF_spec

Figure 6 AC line current filter The required Lfilter is
Figure 6 AC 线电流滤波器 所需的 Lfilter 是

filterSW

specHF

HF filter Cf I I L 2 _ )2(

1

π

+ ≥ (19) normally there is one EMI X2 capacitor which can act as C filter. In this example, if we define I HF_spec as 0.2A peak to peak and asumming X2 capacitance 0.47 µ F, then
+ ≥ (19) 通常有一个 EMI X2 电容可以作为 C 滤波器。在这个例子中，如果我们定义 I HF_spec 为 0.2A 峰峰值，并假设 X2 电容为 0.47 µF，那么

HFkHz A A L filter µµπ 8947.0)652(

12.0 2.1

2 =⋅⋅

+ ≥

Application Note 12 2008-08-01

The leakage inductance of EMI common mode choke can be used for current filter. If the leakage inductance is large enough, no need to add the additional differentia l mode inductor for filtering. Otherwise, a current filter choke is necessary. The calculation method for the current filter choke is the same as for boost choke.
EMI 共模扼流圈的漏感可以用于电流滤波。如果漏感足够大，就不需要添加额外的差模电感进行滤波。否则，需要使用电流滤波扼流圈。电流滤波扼流圈的计算方法与升压扼流圈相同。

2.7 Boost Output Bulk Capacitance
2.7 提升输出批量电容

The bulk capacitance has to fullfil two requirements, output double line frequency ripple and holdup time. (1) output double line frequency ripple limit. The inherent PFC always presents 2*f L ripple. The amplitude of ripple voltage is dependant on output current and bulk capacitance as below.
The bulk capacitance 必须满足两个要求，输出双线频率纹波和保持时间。(1) 输出双线频率纹波限制。固有的 PFC 始终呈现 2*fL 纹波。纹波电压的幅度取决于输出电流和 bulk capacitance。

pprippleoutL

out out Vf IC

__ *2 ⋅⋅≥ π (20) where, Iout is the PFC output current, V out_ripple_pp is the output voltage ripple (peak to peak), and f L is the AC line frequency. Please note that ICE2PCXX has enhance dynamic bloc k which is active when Vout exceed ±5% of regulated level. The enchanc dynamic block should be designed to work only during load or line change. During steady state with constant load, the enhan ce dynamic block should not be triggered, otherwise THD will be deteriorated. T hat means the target V out_ripple_pp must be lower than 10% of V out. For this example, Vout=390VDC, then Vout_ripple_pp must be lower than 39V. if we define Vout_ripple_pp=12V, then
;_;2 ⋅⋅≥ π (20) 其中，Iout 是 PFC 输出电流，V_out_ripple_pp 是输出电压纹波（峰-峰值），f_L 是交流线频。请注意，ICE2PCXX 有增强动态区块，当输出电压超过调节水平的±5% 时，该增强动态区块会激活。增强动态区块应在负载或线电压变化时工作。在恒定负载的稳态下，增强动态区块不应被触发，否则总谐波失真会恶化。这意味着目标 V_out_ripple_pp 必须低于 V_out 的 10%。对于这个例子，Vout=390VDC，那么 Vout_ripple_pp 必须低于 39V。如果定义 Vout_ripple_pp=12V，那么

FVf IC

pprippleoutL

out out µπ 2202 __ =⋅⋅⋅≥ (21) (2) holdup time requirement After the PFC stage, there is commonly a PWM stage to provide isolated DC output for end user. Some applications, especially computing, have the holdup time requirement. It means that PWM stage should be able to provide the isolated output even if AC input voltage become zero for a short holdup time. The common specification for this holdup time is 20ms. If minimum input voltage for PWM stage is defined as 250VDC, then the bulk capacitance will be
out out µπ 2202 __ =⋅⋅⋅≥ (21) (2) 延时要求 在 PFC 阶段之后，通常会有一个 PWM 阶段，以提供隔离的直流输出供终端用户使用。一些应用，尤其是计算领域，有延时要求。这意味着 PWM 阶段即使在交流输入电压在短时间内变为零的情况下，也应该能够提供隔离的输出。这种延时的常见规范是 20 毫秒。如果 PWM 阶段的最小输入电压定义为 250VDC，那么主电容将会是

FmsW VV tPC

outout

holdupout out µ 134250390 2030022

222 min_ 2 =− ⋅⋅= − ⋅⋅≥ (22) the final Cout capacitance should be higher value calculated from the above two requirements.
222 min_ 2 =− ⋅⋅= − ⋅⋅≥ (22) 最终的 Cout 电容值应高于上述两个要求计算出的值。

2.8 Current Sense Resistor
2.8 电流检测电阻

The current sense resistance is calculated based on the IC soft over current control threshold and peak current carried by boost choke. When the Isense signal reaches the soft over control threshold, IC will reduce the internal control voltage and accordingly the duty cycle is reduced in the followi ng cycles. Finally the boost choke current is limited. According to IC datasheet, soft over current control threshold is -0.68V maximum. So the current sense resistor should be
当前的感抗电阻是基于 IC 软过流控制阈值和由升压电感承载的峰值电流来计算的。当 Isense 信号达到软过流控制阈值时，IC 会降低内部控制电压，相应地在随后的周期中降低占空比。最终，升压电感电流被限制。根据 IC 数据表，软过流控制阈值最大为-0.68V。因此，感抗电阻应该

Ω==≤ 11.014.6 68.068.0

_ A V I VR
_A V I VR

pkL sense (23)

Application Note 13 2008-08-01

According to Figure 2 and Figure 3, the transistor current as well as the diode current flows through R sense. That means, when AC is powered up, a large negative voltage drop at R sense will be observed when large inrush current in the range of about 150 A to 200 A flows through the resistor. It is therefore necessary to limit the current into Pin 2 (ISENSE) to 1 mA, which is realized with resistor R3. A value of R3 = 220 Ω is sufficient for this resistor.
根据图 2 和图 3，晶体管电流以及二极管电流会流经 R sense。这意味着，在 AC 接通电源时，当有大约 150A 到 200A 的涌流通过电阻时，会在 R sense 上观察到一个大的负电压降。因此，需要将流入 Pin 2（ISENSE）的电流限制在 1mA，这通过电阻 R3 实现。R3 的值为 220Ω就足够了。

2.9 Output voltage sensing divider
2.9 输出电压分压器

The output voltage is set with the voltage divider represented by R 1 and R 2 in Figure 2 and Figure 3. First, choose the value of the lower resistor R2. Then the value of the upper resistor R1 is
输出电压通过图 2 和图 3 中的电阻分压器 R1 和 R2 设置。首先选择下端电阻 R2 的值。然后选择上端电阻 R1 的值。

21 RV VVR

ref

refout ⋅−= (24) where, Vref is IC internal reference voltage for voltage sensing, 3V typical. If R2=6k Ω ,
refout ⋅−= (24) 其中，Vref 是 IC 内部电压参考电压，典型值为 3V。若 R2=6k Ω ，

Ω=Ω⋅−= kkR 774103 3390 1 It is recommended to take resistor values with a tolerance of 1% for R 1 and R 2. Due to the voltage stress of R1, it is recommended to split this value into few resistors in series.
Ω=Ω⋅−= kkR 774103 3390 1 建议 R1 和 R2 的电阻值的公差为 1%。由于 R1 上的电压应力，建议将此值分成几个串联的电阻。

2.10 Frequency setting ( only for ICE2PCS01)
2.10 频率设置（仅适用于 ICE2PCS01）

The frequency of the ICE2PCS01 is adjustable in the range of 50 kHz up to 250 kHz. The external resistor RFREQ according to Figure 7 programs a current which controls the oscillator.
ICE2PCS01 的频率可以在 50 kHz 到 250 kHz 的范围内调整。外部电阻 RFREQ 根据图 7 编程控制振荡器的电流。

Figure 7 Resistor-frequency characteristic
Figure 7 电阻-频率特性

Application Note 14 2008-08-01

2.11 AC Brown-out Shutdown (only for ICE2PCS02)
2.11 AC 电压降低关闭（仅适用于 ICE2PCS02）

Brown-out occurs when the input voltage VAC falls be low the minimum input voltage of the design (i.e. 85V for universal input voltage range) and the VCC has no t entered into the VCCUVLO level yet. For a system without input brown out protection (IBO P), the boost converter will increasingly draw a higher current from the mains at a given output power which may exceed t he maximum design values of the input current and lead to over heat of MOSFET and boost diode. ICE2PCS02 provides a new IBOP feature whereby it senses directly the input voltage for Input Brown-Out condition via an external resistor/capacitor/diode network as shown in Figure 8. This network provides a filtered va lue of VIN which turns the IC on when the voltage at Pin 4 (VINS) is more than 1.5V. The IC enters into the standby mode and gate is off when VINS goes below 0.7V. The hysteresis prevents the system to oscillate between normal and standby mode.
Brown-out 发生在输入电压 VAC 低于设计的最小输入电压（即，对于通用输入电压范围为 85V）且 VCC 尚未进入 VCCUVLO 电平的情况下。对于没有输入欠压保护（IBO P）的系统，升压转换器在给定输出功率下将越来越从市电中抽取更高的电流，这可能会超过输入电流的最大设计值，导致 MOSFET 和升压二极管过热。ICE2PCS02 提供了一种新的 IBOP 功能，通过外部电阻/电容/二极管网络直接检测输入电压以判断输入欠压条件，如图 8 所示。该网络提供 VIN 的滤波值，当 Pin 4（VINS）的电压超过 1.5V 时，IC 开启。当 VINS 下降到 0.7V 以下时，IC 进入待机模式且栅极关闭。迟滞效应防止系统在正常模式和待机模式之间振荡。

Figure 8 Block diagram of voltage loop Because of the high input impedence of comparator of C4 and C5, R5 can be high ohmic resistance to reduce the loss. From the datasheet, the bias current on VINS Pin is 1 µ A maximum. In order to have the design consistence, the current passing through R5 and R6 has to be much higher than this bias current, for example 6µ A. Then R6 is:
Figure 8 电压环路的框图 由于比较器 C4 和 C5 的高输入阻抗，R5 可以是高阻值电阻以减少损耗。从数据表中，VINS 引脚的偏流最大为 1 µA。为了保持设计一致性，流过 R5 和 R6 的电流必须远高于这个偏流，例如 6 µA。那么 R6 是：

Ω== kuA VR 1176 7.0 6 (25) R6 is selected 120K Ω . R5 is selcted by

6 _ 5 5.1 5.12 RV VVR onAC ⋅−⋅= (26) where, VAC_on is the minimum AC input voltage (RMS) to start PFC, for example 70VAC.
6 _ 5 5.1 5.12 RV VVR onAC ⋅−⋅= (26) 其中，VAC_on 是 PFC 启动所需的最小 AC 输入电压（RMS），例如 70VAC。

Ω=Ω⋅−⋅= MkV VVR 8.71205.1 5.1702 5 Due to the voltage stress of R5, it is recommended to split this value into few resistors in series. C4 is used to modulate the ripple at the VINS pin. The timing diagram of VINS pin when IC enters brown-out shutdown is shown in Figure 9.
Ω=Ω⋅−⋅= MkV VVR 8.71205.1 5.1702 5 由于 R5 的电压应力，建议将此值分成几个串联的电阻。C4 用于调节 VINS 引脚的纹波。当 IC 进入棕出关断状态时，VINS 引脚的时序图如图 9 所示。

Application Note 15 2008-08-01

Figure 9 Timing diagram of VINS Pin when IC enters brown-out shutdown If the bottom level of the ripple voltage touches 0.7V, PFC is in standby mode and gate is off. The ripple voltage defines PFC brown out off threshold of AC input voltage (RMS), V AC_off. C4 can be obtained from the following equation. Assuming offACAVEINS VRR RV _ 65
Figure 9 VINS Pin 的时序图，当 IC 进入 brown-out 关断状态时。如果纹波电压的底端达到 0.7V，PFC 处于待机模式且门关闭。纹波电压定义了 AC 输入电压（有效值）的 PFC brown out 关断阈值，即 V_AC_off。C4 可以从以下方程获得。假设 offACAVEINS VRR RV _ 65

6 _ ⋅+= , where, VAC_off is the maximum AC input voltage (RMS) to switch off PFC, for example 65VAC.
6 _ ⋅+= ，其中，VAC_off 是开关关断 PFC 的最大交流输入电压（RMS），例如 65VAC。

VeVRR R CR t offAC

edisch 7.0)7.02( 46

arg

_ 65

6 =⋅−⋅+⋅ − (27) assuming tdischarge is equal to half cycle time of line frequency, ie.
6 =⋅−⋅+⋅ − (27) 假设放电时间等于线频率的一个半周期，即。

L edisch ft 2 1 arg = , then

nFV

VVkM k kHzC

V

VVRR R RfC

offAC L

1407.0

7.0651208.7 1202 ln120502

7.0

7.02 ln2

1 4

1 _ 65

6 64

=     

     

 −Ω+Ω Ω⋅ Ω⋅⋅=

    

     

 −+⋅ =

−

−

(28)

2.12 IC supply
2.12 IC 供电

The IC supply voltage operating range is 11~26V. There are two stages during IC turned on. First Vcc capa citor is charged from 0V to 7V, the IC internal regulator block starts to reset voltage at all external pins. The reset process will take about 10us. And then when Vcc voltage is charged to Vcc_on threshold, IC starts the soft start with gate switching. In the case of Vcc decoupling capacitance is too low such as 0.1uF, Vcc voltage may be charged up too fast and the time interval from Vcc=7V to Vcc_on is less than the reset time. Then the IC will not go through a proper soft start as the voltages at IC pins are not yet properly reset. To avoid such a problem, the delay circuitry is needed.
IC 供电电压工作范围是 11~26V。IC 开启时有两个阶段。首先 Vcc 电容从 0V 充电到 7V，IC 内部稳压块开始复位所有外部引脚的电压。复位过程大约需要 10us。然后当 Vcc 电压充电到 Vcc_on 阈值时，IC 开始软启动。如果 Vcc 去耦电容太低，例如 0.1uF，Vcc 电压可能充电过快，从 Vcc=7V 到 Vcc_on 的时间间隔小于复位时间。这样 IC 可能无法进行适当的软启动，因为 IC 引脚上的电压尚未正确复位。为了避免这个问题，需要延迟电路。

Application Note 16 2008-08-01

Power on control
电源控制

IC Vcc Cvcc 10k

10k

Cdelay 0.47uF0.1uF

Q1 Q2

AUX supply input R1 R2

Figure 10 Vcc supply circuitry Figure 10 is a typical circuitry to supply PFC controller. Q2 is NPN transistor and controlled by external “Power on” signal. When “Power on” signal is “high”, Q2 is turned on provides base current for Q1. Q1 is turned on accordingly to supply auxiliary power to IC Vcc. The reset delay time is adjustable by changing the RC time constant of R1, R2 and Cdelay. The recommended values are shown in Figure 10 as 10k Ω , 10kΩ and 0.47uF respectively. The same reset process also happens during IC power down when Vcc is discharged from Vcc_off to 7V. The reset time for power down is around 200us. Because IC is in power down mode with very low current consumption, typically 300uA only, the required Vcc capacitance for power down reset can be calculated as:
Figure 10 Vcc 供电电路 Figure 10 是一个典型的 PFC 控制器供电电路。Q2 是一个 NPN 晶体管，并由外部“电源开启”信号控制。当“电源开启”信号为“高”时，Q2 导通，为 Q1 提供基极电流。Q1 导通以向 IC Vcc 供应辅助电源。复位延迟时间可以通过改变 R1、R2 和 Cdelay 的 RC 时间常数来调整。推荐的值如图 10 所示，分别为 10k Ω、10kΩ 和 0.47uF。同样的复位过程也发生在 IC 断电时，当 Vcc 从 Vcc_off 放电到 7V 时。断电复位时间大约为 200us。由于 IC 处于断电模式，电流消耗极低，通常仅为 300uA，因此断电复位所需的 Vcc 电容值可以计算得出：

nFVV sA VV tIC

resetoffcc

resetdownpower VCC 2.3874.10 200650

min__

max__ =− ⋅=− ⋅≥ µµ (29) So the common Vcc decoupling capacitance 0.1uF is enough for reset delay requirement.
max__ =− ⋅=− ⋅≥ µµ (29) 因此，常见的 Vcc 去耦电容 0.1uF 对复位延迟要求来说已经足够。

2.13 PCB layout guide
2.13 PCB 布局指南

In order to avoid crosstalk on the board between powe r and signal path, and to keep the IC GND pin as “clean” from noise as possible, the PCB layout for GN D must be taken care of properly. Below are some suggestions for GND connection and Figure 11 below illustrates as a good example. (1) Star connection rule for main power stage GND: the PCB tracks of MOSFET source, output load GND, IC auxiliary supply GND and shunt resistor are separated and connected together at bulk capacitor negative Pin. (2) Star connection rule for small signal IC G ND: the IC external components which need to be connected to the small signal GND bus highlighted in red color. Such GND bus is connected to IC GND Pin. (3) Connection between main power stage GND and sma ll signal IC GND: in Figure 11, a single PCB track in pink color directly connect IC GND pin to power stage star connection point - bulk capacitor negative. This is to ensure that the voltage between IC Isense Pin and IC GND Pin does not observe the switching rectangular noise current. The dark green and blue tracks denote for flowing paths of high frequency rectangular switching current. (4) Vcc decoupling capacitor Cvcc: the decoupling capacitor need to be placed close to IC Vcc and GND Pins as much as possible. The GND track of Cvcc (green color in Figure 11) should be connected at the point on the single PCB trac k connecting between IC GND Pin and power GND point so that the large gate charging current will not pass through the small signal GND bus. (5) Vsense capacitor Cvsense: to reduce noise in Vsense Pin, small capacitor up to 0.1uF can be added between Vsense Pin and small signal GND bus.
为了避免电路板上电源和信号路径之间的串扰，并尽可能保持 IC GND 引脚不受噪声干扰，PCB 的 GND 布局必须妥善处理。以下是一些建议的 GND 连接方法，图 11 则是一个很好的示例。（1）主电源阶段 GND 的星形连接规则：MOSFET 源极、输出负载 GND、IC 辅助电源 GND 和分流电阻的 PCB 走线分离并在大容量电容负极引脚处连接在一起。（2）小信号 IC GND 的星形连接规则：需要连接到小信号 GND 总线的 IC 外部组件（用红色高亮标注）。该 GND 总线连接到 IC GND 引脚。（3）主电源阶段 GND 和小信号 IC GND 之间的连接：在图 11 中，一条粉色 PCB 走线直接将 IC GND 引脚连接到主电源阶段的星形连接点——大容量电容负极。这确保了 IC Isense 引脚和 IC GND 引脚之间的电压不会受到开关矩形噪声电流的影响。深绿色和蓝色的走线表示高频矩形开关电流的流动路径。 (4) Vcc 去耦电容 Cvcc：去耦电容需要尽可能靠近 IC 的 Vcc 和 GND 引脚放置。Cvcc 的 GND 走线（图 11 中的绿色部分）应连接在 IC GND 引脚和电源 GND 之间的单层 PCB 走线上，以防止大的栅极充电电流通过小信号 GND 总线。 (5) Vsense 电容 Cvsense：为了减少 Vsense 引脚的噪声，可以在 Vsense 引脚和小信号 GND 总线之间添加一个至多 0.1uF 的小电容。

Application Note 17 2008-08-01

L1

T1

R1

R2 COUT

RSENSE

EMI Filter
EMI 滤波器

R3

GATE GND VSENSE ISENSE

C2 R4 C3

VCOMP FREQ ICOMP

VCC

Auxiliary Supply ICEXPCS01
辅助供应 ICEXPCS01

Rectifier
整流器

VIN=85V ...265V AC

RFREQ

VOUT=400VDC

C1

Cvsense

Cvcc

Figure 11 Good PCB layout illustration
Figure 11 好的 PCB 布局示例

3 Voltage loop and current loop compensation
3 电压环和电流环补偿

This section provides a model and a tool for evalua ting and improving the contro l loop characteristics of ICE2PCS02-based PFC pre-regulators in boost topology. The goal is not only to ensure a narrow bandwidth in order to achieve a high Power Factor, but also to have enough phase margin so as to make sure the system is stable over a large range of operating conditions. The design example is demonstrated as well. Traditional diode rectifiers used in front of the electr onic equipment draw pulsed current from the utility line, which deteriorates the line voltage, produce radiated and conducted electromagnetic interference, leads to poor utilization of the capacity of the power sources. In compliance with IEC 61000-3-2 harmonic regulation, active power factor correction (PFC) circuit is getting more and more attention in recent years. For low power up to 200W, discontinuous conduction mode (DCM) PFC is popular due to its lower cost. Furthermore, there is only one control loop, i.e. voltage loop, in its trans ferring control blocks. The design is easy and simple for DCM operation. However, due to its in herent high current ripple, DCM is seldom to be used for high power applications. In high power applications, continuous conduction mode (CCM) PFC is more attractive.
本节提供了一种模型和工具，用于评估和改善基于 ICE2PCS02 的 PFC 预调节器在升压拓扑中的控制环路特性。目标不仅是确保窄带宽以实现高功率因数，还要有足够的相位裕度，以确保系统在广泛的运行条件下保持稳定。此外，还展示了设计示例。传统的在电子设备前端使用的二极管整流器从公用电源线抽取脉冲电流，这会恶化线路电压，产生辐射和传导的电磁干扰，导致电源容量利用率低。为了符合 IEC 61000-3-2 谐波规定，近年来主动功率因数校正（PFC）电路越来越受到关注。对于低功率（至 200W），断续传导模式（DCM）PFC 因其较低的成本而流行。此外，其传输控制块中只有一个控制环路，即电压环路。对于 DCM 操作，设计简单且容易。然而，由于其固有的高电流纹波，DCM 很少用于高功率应用。 在高功率应用中，连续导通模式（CCM）PFC 更具吸引力。

V, I OUT I

IL

IIN DCM operation CCM operation Figure 12 DCM and CCM PFC principle
IIN DCM 操作 CCM 操作 图 12 DCM 和 CCM PFC 原理

Application Note 18 2008-08-01

3.1 How to achieve PFC function without sinusoidal reference sensing
3.1 如何在没有正弦参考检测的情况下实现 PFC 功能

3.1.1 Boost converter modeling
3.1.1 提升转换器建模

Figure 13 shows the inductor current waveform for boost converter operating in continuous conduction mode.
图 13 显示了连续导通模式下升压转换器的电感电流波形。

di L

i L

T SW

t on t of f

I0

Figure 13 inductor current waveform of boost converter operating in CCM mode assuming Vin is boost converter input DC voltage, Vout is the boost converter output voltage, L is the boost choke inductance, ton is the on time duration in one sw itching cycle, toff is the off time duration in one switching cycle, doff is the off time duty cycle and Tsw is the time duration in one switching cycle. During “on” interval,
Figure 13 提升转换器在连续导通模式下工作的电感电流波形，假设 Vin 是提升转换器的输入直流电压，Vout 是提升转换器的输出电压，L 是提升电感的电感量，ton 是在一个开关周期中的导通时间，toff 是在一个开关周期中的关断时间，doff 是关断时间占空比，Tsw 是一个开关周期的时间。在“导通”区间，

L V dt di inL = (30) During “off” interval,
L V dt di inL = (30) 在“关”间隔期间，

L VV dt di outinL −= (31) And then the boost inductor current variation after one switching cycle is:
L VV dt di outinL −= (31) 然后一个开关周期内的升压电感电流变化为：

SW offoutin off outin on in L TL dVVtL VVtL Vdi ⋅⋅−=⋅−+⋅= (32) The instant boost inductor current after n switching cycle is:
SW offoutin off outin on in L TL dVVtL VVtL Vdi ⋅⋅−=⋅−+⋅= (32) 一个开关周期后的瞬时 boost 电感电流是：

SW noffnoutnin nLnL TL dVVii ⋅ ⋅ −+= − ___ 1__ (33)

3.1.2 PFC IC control principle with boost topology
3.1.2 PFC IC 控制原理与 Boost 拓扑

PFC IC control block is inserted in boost converter as shown in Figure 14.
PFC IC 控制块插入在 boost 转换器中，如图 14 所示。

Application Note 19 2008-08-01

Vin Boost converter iL
Vin Boost 转换器 iL

IC PWM modulation doff=K*iL
IC PWM 调制 doff=K*iL

doff

SW no ffnoutnin nLnL T L dVVii ⋅ ⋅ − += − ___ 1__

Figure 14 PFC current loop principle IC senses boost inductor average current, and calculat e the off duty cycle to be proportional to inductor current, and then send such off duty cycle back to boost converter. The negative feedback loop can be seen from Figure 14. A small disturb increasing on i L will result in a little bit increasing on off duty cycle. The increasing off duty cycle will lead to decreasing of iL after processing by boost converter. In the stead state,
Figure 14 PFC 电流环路原理 IC 检测 BOOST 电感的平均电流，并计算关断占空比与电感电流成正比，然后将该关断占空比反馈回 BOOST 转换器。负反馈环路如图 14 所示。iL 上的小扰动会导致关断占空比稍微增加。关断占空比的增加会在 BOOST 转换器处理后导致 iL 减小。在稳态下，

Loutoffoutin iKVdVV ⋅⋅=⋅= (34) Where, K is the modulation gain defined by IC. It c an be seen that boost inductor current shape follows AC input voltage and it is how PFC function to be achieved. In the following sections, detail mathematical analysis of current loop and voltage loop will be described and the transfer function for each block is given in or der to design IC external compensation network components.
Loutoffoutin iKVdVV ⋅⋅=⋅= (34) 其中，K 是调制增益，由 IC 定义。可以看出，升压电感电流的波形跟随交流输入电压，这就是 PFC 功能实现的方式。在接下来的部分中，将详细分析电流环和电压环的数学模型，并给出每个模块的传递函数，以便设计 IC 外部补偿网络的元件。

3.2 Current Loop Regulation and Transfer Function
3.2 当前回路调节和传递函数

The detail block diagram of current loop for ICE2PCS 02 is shown in the Figure 15. The boost converter stage Kboost is elaborated in S-plane.
ICE2PCS 02 的当前环路详细框图如图 15 所示。Kboost 升压转换器阶段在 S 平面中详细说明。

Boost Converter Power Stage Kboost(s)

PWM Comparator Kc(S)
PWM 比较器 Kc(S)

iL

Current Averaging Kave(S)
当前平均 Kave(S)

M2

Vicomp

M1

Doff

Vin Vout

+ - X 1/sL

Figure 15 Block diagram of current loop
Figure 15 当前环路的框图

3.2.1 Current Averaging Circuit
3.2.1 当前平均电路

IC sense the boost inductor current via shunt resistor Rsense as shown in Figure 2. The sensing signal is sent to Isense Pin. As the voltage in Isense Pin is n egative signal together with switching ripple, IC need to do signal averaging and convert the polarity to positi ve for following PWM modulation blocks. The output of averaging block is Vicomp voltage at Icomp Pin. the bl ock diagram of current aver aging block is shown in Figure 16.
IC 通过分流电阻 Rsense 检测增强电感器电流，如图 2 所示。感测信号发送到 Isense 引脚。由于 Isense 引脚上的电压是与开关纹波一起的负信号，IC 需要进行信号平均并转换极性为正，以便后续的 PWM 调制块使用。平均块的输出是 Vicomp 电压，位于 Icomp 引脚。电流平均块的框图如图 16 所示。

Application Note 20 2008-08-01

Figure 16 current averaging block diagram The transfer function of averaging circuit block can be derived as below.
Figure 16 当前平均块图 考虑到平均电路块的传输函数可以如下推导。

21

1

1

1

1 )(

OTA

icomp

sense L

icomp AVE

gM CKs

M RK i VsK ⋅+ == (35) where, K1 is a ratio between R501 and R7 which is equal to 4, C icomp is the capacitor at Icomp Pin, gOTA2 is the trans-conductance of the error am plifier of OTA2 for current aver aging, typical 1.0mS as shown in Datasheet, M1 is the variable controlled by voltage loop. The function of the averaging circuit is to filter out the switching current ripple. So the corner frequency of the averaging circuit fAVE must be lower than the switching frequency fSW. Then,
M RK i VsK ⋅+ == (35) 其中，K1 是 R501 和 R7 之间的比值，等于 4，C icomp 是 Icomp 引脚上的电容，gOTA2 是 OTA2 误差放大器的跨导，典型值为 1.0mS，如数据表所示，M1 是由电压环路控制的可变参数。均值电路的功能是滤除开关电流纹波。因此，均值电路的角频率 fAVE 必须低于开关频率 fSW。

AVE

OTA icomp fK MgC π 2 1

12 ⋅≥ (36)

3.2.2 PWM comparator block
3.2.2 PWM 比较器模块

The averaged Vicomp signal is sent to PWM comparator block and compared with internal triangular ramp signal to derive duty cycle. The timing diagram of this block is shown in Figure 17.
平均后的 Vicomp 信号被发送到 PWM 比较器块并与内部三角波信号进行比较以得出占空比。该块的时序图如图 17 所示。

Application Note 21 2008-08-01

C1

PWM Comparator
PWM 比较器

Vramp=M2*Kfq

Tosc

Vicomp From protection logic
Vicomp 从保护逻辑

To PWM logic and gate driver block
向 PWM 逻辑和门驱动块

Ramp Gate drive

Vicomp

Oscillator Figure 17 The block diagram and timing sequence of PWM comparator block The operating principle is explained as following. Gate output is in “low” state in the beginning of the each cycle. Gate output is turned to “high” at the intersection of the triangular ramp signal and Vicomp signal. Gate output is turned to “low” by oscilla tor synchronous signal. Based on the operating principle, the transfer function of KC(s) is:
Oscillator 图 17 PWM 比较器模块的框图和时序图 工作原理如下。每个周期开始时门输出处于“低”状态。门输出在三角斜坡信号和 Vicomp 信号的交点处变为“高”。门输出由振荡器同步信号变为“低”。根据工作原理，KC(s)的传递函数为：

2 1)( MKV dsK

FQicomp

off C == (37) Where, KFQ is a design constant which is equal to 9.183, M2 is the variable controlled by voltage loop.
off C == (37) 其中，KFQ 是一个设计常数，等于 9.183，M2 是由电压环控制的变量。

3.2.3 Boost converter stage
3.2.3 提升转换阶段

The transfer function of boost converter stage K Boost(s) can be obtain via State-Space Averaging method. Combining equation (30) and (31) by state –space averaging,
The boost 变换器级的传递函数 K Boost(s)可以通过状态空间平均法获得。通过状态空间平均法结合方程(30)和(31)，

L dVVd L VVd L V dt di offoutin off outin on inL −=−+= (38) Make Laplace transformation for equation (38) with as suming Vin and Vout are constant for current loop analysis,
L dVVdL VVdtioffoutinoffoutinoninL−=−+= (38) 对方程(38)进行拉普拉斯变换，假设 \(V_{in}\) 和 \(V_{out}\) 在电流环分析中为常数，

sLsdVVsi offoutinL 1))(()( −= (39) The equation (39) has been described in current loop block diagram in Figure 15. Although Vin is not physically sensed by circuit, the input sinusoidal signal is presented in transfer functions only if boost topology is applied.
sLsdVVsi offoutinL 1))(()( −= (39) 方程（39）在图 15 的当前环路块图中已经被描述。尽管 Vin 没有被电路物理检测到，但在采用升压拓扑时，输入的正弦信号仅在传递函数中呈现。

3.2.4 Open loop transfer function gain for current loop
3.2.4 开环电流环路增益传输函数

The open loop gain of current regulation loop is:
电流调节环路的开环增益为：

)1( )()()(

21

1

21

1 OTA

icomp

FQ

outsense out CAVEC

gM CKss

LMMK VRK sL VsKsKsG ⋅+ == (40)

Application Note 22 2008-08-01

The selected C icomp must also meet the requirement that t he cross over frequency of the current loop fC is much lower than the switching frequency fSW.
选定的 C icomp 必须同时满足交叉频率 fC 比开关频率 fSW 低得多的要求。

3.2.5 Steady state solution of IL
3.2.5 IL 的稳态解

Solving the current loop in Figure 15,
解决图 15 中的当前循环

sLsisKsKVVsLsdVVsi LAVECoutinoffoutinL 1))()()((1))(()( −=−=

)(1)()(1 )( sG sL V sL sKsKV sL V si

C

in AVECout

in L += + = (41) For AC line frequency which is much lower than fC, then 1)( >>sG c
在 L += + = (41) 对于 AC 线频率远低于 fC 的情况，然后 1)( >>sG c

21

1

1

21

1)()(1)(

OTA

icomp

outsense

inFQ C

in C
在 C

in L

gM CKs

VRK VMMK sG sL V sG sL V si ⋅+ =≈+= (42) For AC line frequency which is also much lower than fAVE, 1
VRK VMMK sG sL V sG sL V si ⋅+ =≈+= (42) 对于 AC 线路频率，也远低于 fAVE，1

21

1 <<⋅

OTA

icomp gM CKs , then the steady state IL can be derived as
icomp gM CKs ，然后可以推导出稳态 IL

outsense

inFQ L VRK VMMKI

1

21 = (43) from the above steady state solution of I L, it can be seen that the choke current I L is always following input voltage V in. This is how PFC function is achieved.
21 = (43) 从上述 I L 的稳态解中可以看出，临界电流 I L 总是跟随输入电压 V in。这就是 PFC 功能的实现方式。

3.3 Voltage Loop Compensation
3.3 电压回路补偿

The control loop block diagram for ICE2PCS02 based CCM PFC is shown in Figure 18 and Figure 19. There are four blocks in the loop. IC PWM Modulator G2(s) has been discussed in above Section 3. the rest of them are Error Amplifier G1(s), nonlinear block GNON(s), boost converter output stage G3(s) and Feedback Sensing G4(s).
ICE2PCS02 基于 CCM PFC 的控制环路框图如图 18 和图 19 所示。环路中有四个块。IC PWM 调制器 G2(s)已在第 3 节中讨论。其余的分别是误差放大器 G1(s)、非线性块 GNON(s)、Boost 变换器输出级 G3(s)和反馈检测 G4(s)。

Error Amplifier G1(s) Vref + Vcomp PWM Modulator G2(s) iL

Vsense

Vout Boost converter output Stage G3(s)
Vout Boost 变换器输出 级 G3(s)

Feedback G4(s)

-

Vin

5V

400V

0V

Vcomp_DC

Nonlinear block GNON(s) M1M2

Figure 18 Large signal modeling of voltage loop
Figure 18 大信号电压环路模型

Application Note 23 2008-08-01

Output Stage G3(s) PWM modulation G2(s)
输出阶段 G3(s) PWM 调制 G2(s)

Voltage loop Error Amplifier G1(s)
电压环错误放大器 G1(s)

+ Output Stage
+ 输出阶段

Feedback
反馈

- V se n s e∆
V se n s e∆

V c o m p∆

AV Eout

i n rm s V V

_

out I∆

o ut sC 1 out V ∆ Non- linear GNON(s)
o ut sC 1 out V ∆ 非线性 GNON(s)

r msL I _ ∆ MM∆

21

_ MM I r msL + -

AV Eout

r msL V I

_

_

Figure 19 Small signal modeling of voltage loop
Figure 19 小信号模型化电压环路

3.3.1 Boost converter output stage G3(s)
3.3.1 Boost 转换器输出级 G3(s)

Boost converter output stage is describ ed as influencing of variation on i L to bulk output voltage Vout. The transfer function of power stage, G3(s), is separated to two stages as:
Boost 转换器输出级被描述为影响 iL 的变化对 bulk 输出电压 Vout 的影响。功率级传递函数 G3(s)被分为两个阶段：

rmsL

out out

out rmsL

out I I I V I VsG

__ 3 )( ∆ ∆⋅∆ ∆=∆ ∆= (44) where Vout is the DC output voltage, Iout the DC output current and IL_rms is the boost inductor current.
__ 3 )( ∆ ∆⋅∆ ∆=∆ ∆= (44) 其中 Vout 是直流输出电压，Iout 是直流输出电流，IL_rms 是升压电感电流。

3.3.1.1 ∆ Vout / ∆ Iout
∆ Vout / ∆ Iout

Under the above assumption, the po wer stage can be modeled as illustrated in Figure 20: a controlled current source (with a shunt resistor Re) that drives the output bulk capacitor C out and the load resistance Rout (= Vout / Iout). The zero due to the ESR associated with Cout is far beyond the crossover frequency thus it is neglected.
Under 上述假设，功率级可以如图 20 所示建模：一个受控电流源（带有分流电阻 Re），驱动输出电容 Cout 和负载电阻 Rout（等于 Vout/Iout）。由于与 Cout 相关的 ESR 引起的零点远在交叉频率之外，因此被忽略。

Re RoutIout Vout Cout
Re Rout Vout Cout

Figure 20 Power stage modeling A few algebraic manipulations would show that the sh unt resistor Re always equals the DC load resistance Rout, thus it changes depending on the power delivered by the system. There are two kinds of load in the application. Two cases will give a different result in ca se of resistive load or constant power load. For purely resistive load, the AC load resistance equals Ro. In case of constant power load like additional isolated PWM DC/DC converter, the AC load resistance is equal to -Ro (if the DC bus decreases, the current demanded of the PFC increases. hence the negative sign is shown.). As a result, the parallel combination with Re tends to infinity and the two resistances cancel. The current sour ce drives only the output capacitor. The result is summarized as below:
Figure 20 功率级建模 一些代数变换会表明旁路电阻 Re 总是等于直流负载电阻 Rout，因此它会根据系统提供的功率而变化。在应用中有两种类型的负载。两种情况下，对于电阻性负载或恒定功率负载，结果会有所不同。对于纯电阻性负载，交流负载电阻等于 Ro。在恒定功率负载的情况下，例如额外的隔离 PWM DC/DC 变换器，交流负载电阻等于 -Ro（如果直流母线电压下降，PFC 所需的电流增加，因此出现了负号）。因此，Re 与这两个电阻的并联组合趋向于无穷大，两个电阻相互抵消。电流源仅驱动输出电容。结果总结如下：

Application Note 24 2008-08-01

  

  

 ⋅+=∆ ∆

out

outout

out out

out

sC

CRs

R I V 1

)21(2 (45) In this application note, the calculation is only carried out for constant power load situation
）21（2 （45） 在此应用说明中，仅对恒定功率负载情况进行计算

3.3.1.2 ∆ Iout / ∆ IL_rms

The current source Iout can be charac terized with the following considerations as shown in Figure 21. The low frequency component of the boost diode current is found by averaging the discharge portion of the inductor current over a given swit ching cycle. The low frequency curre nt, averaged over a mains half-cycle yields the DC output current Iout:
当前的源 Iout 可以通过以下考虑来表征，如图 21 所示。Boost 二极管电流的低频分量是通过在给定开关周期内对电感电流的放电部分进行平均来找到的。低频电流在半个交流电周期内的平均值给出了直流输出电流 Iout：

i L i diode
i L i 二极管

IOUT

IL_PK

Figure 21 The simplification and characterization for Iout / IL_rms
Figure 21 输出和 IL_rms 的简化与特征描述

AVEout

rmsLinrms AVEout

rmsLinrms PKLonout V IVdSinV IVdSinIDI

_

_ 0

2 _

_ 0 _ )(2)1(1 ==−= ∫∫ ππ ααπααπ (46) So,

AVEout

inrms rmsL

out V V I I

__ =∆ ∆ (47) where, Don is the switch duty cycle; α is the instantaneous phase angle of the mains voltage, Vinrms is the input RMS voltage value, I L_PK is choke current sinewave peak value and V out_AVE is the averaging bulk DC output voltage. In case of constant power load, the transfer function of G3(s) is:
__ =∆ ∆ (47) 其中，Don 是开关 duty cycle；α 是 mains 电压的瞬时相角，Vinrms 是输入 RMS 电压值，IL_PK 是电感电流正弦波峰值值，Vout_AVE 是平均滤波直流输出电压。在恒定功率负载情况下，G3(s) 的传递函数为：

outAVEout

inrms rmsL

out out

out rmsL

out sCV V I I I V I VsG 1)(
out sCV V I I I V I VsG 1)

___ 3 ⋅=∆ ∆⋅∆ ∆=∆ ∆= (48)

3.3.2 Small signal transfer function of ∆ Vout/ ∆ (M1M2) for voltage loop analysis
3.3.2 电压环路分析中 ∆ Vout/ ∆ (M1M2) 的小信号传输函数

There is a internal feedback from Vout to G 2(s). this inner loop has to be solved to obtain the transfer function of ∆ Vout/∆ (M1M2). Rewrite the equation (43) at input voltage RMS point:
There is a internal feedback from Vout to G 2(s). 这个内部回路需要被解决以获得 ∆ Vout/∆ (M1M2) 的传递函数。在输入电压 RMS 点重写方程 (43)：

outsense

inrmsFQ rmsL VRK VMMKI

1

21 _ = (49)

Resistive Load Constant Power Load
电阻负载 恒功率负载

Application Note 25 2008-08-01

making a perturbation on IL_rms, (M1M2), Vout, then
对 IL_rms, (M1M2), Vout 进行扰动，然后

out AVEout

rmsLrmsL rmsL VV IMMMM II ∆−∆=∆

_

_ 21 21

_ _ )( (50) replacing ∆ IL_rms by ∆ Vout/G3(s) according to voltage loop block diagram,
_ _ )( (50) 将 ∆ IL_rms 替换为 ∆ Vout/G3(s) 根据电压环路方块图

out AVEout

rmsLrmsLout VV IMMMM I sG V ∆−∆=∆

_

_ 21 21

_ 3 )()( (51) then the transfer function of dVout/dVcomp is
_ 3 )()( (51) 然后 dVout/dVcomp 的传输函数是

11 )()(

2 21

3 _1

21

_ _

2 _

21

_ 21 23 + = + =∆ ∆= s VMMK CVRK MM V sVI CV MM V MM VsG

inrmsFQ

outAVEoutsense

AVEout inrmsrmsL

outAVEout

AVEout out (52) With

2 21

3 _1 23 2

1

inrmsFQ

outAVEoutsense VMMK CVRK f π = ,

23

21

_ 21 23

21)()( f s MM V MM VsG

AVEout out

π + =∆ ∆= (53)

3.3.3 Nonlinear block GNON(s)
3.3.3 非线性块 GNON(s)

The Vcomp voltage is sent to nonlinear gain block. The output of nonlinear is two internal variables, M1 and M2. The two variables are used to define boost choke current amplitude I L as in equation (43). The characteristic of nonlinear gain block is shown in Table 2 and Figure 22. The small signal gain between ∆ (M1*M2) and ∆ Vcomp can be derived as well at different operating point. Vcomp M1 M2 M1*M2 0.00 4.686E-02 4. 964E-04 2.326E-05 0.25 4.685E-02 7. 072E-04 3.313E-05 0.50 4.665E-02 1. 199E-03 5.595E-05 0.75 4.685E-02 3. 292E-03 1.542E-04 1.00 4.823E-02 3. 224E-02 1.555E-03 1.25 8.153E-02 1. 075E-01 8.766E-03 1.50 1.261E-01 1. 921E-01 2.423E-02 1.75 1.901E-01 2. 796E-01 5.316E-02 2.00 2.747E-01 3. 686E-01 1.013E-01 2.25 3.768E-01 4. 590E-01 1.729E-01 2.50 4.884E-01 5. 523E-01 2.697E-01 2.75 5.992E-01 6. 539E-01 3.918E-01 3.00 6.992E-01 7. 794E-01 5.449E-01 3.25 7.816E-01 9. 669E-01 7.557E-01 3.50 8.443E-01 1.287E+00 1.087E+00 3.75 8.888E-01 1.802E+00 1.601E+00 4.00 9.184E-01 2.442E+00 2.243E+00 4.25 9.339E-01 2.911E+00 2.719E+00
The Vcomp 电压发送到非线性增益块。非线性输出是两个内部变量 M1 和 M2。这两个变量用于定义 boost 电感电流幅度 IL，如方程(43)所示。非线性增益块的特性如表 2 和图 22 所示。在不同的工作点，∆(M1*M2)和∆Vcomp 之间的小信号增益也可以推导出来。Vcomp M1 M2 M1*M2 0.00 4.686E-02 4.964E-04 2.326E-05 0.25 4.685E-02 7.072E-04 3.313E-05 0.50 4.665E-02 1.199E-03 5.595E-05 0.75 4.685E-02 3.292E-03 1.542E-04 1.00 4.823E-02 3.224E-02 1.555E-03 1.25 8.153E-02 1.075E-01 8.766E-03 1.50 1.261E-01 1.921E-01 2.423E-02 1.75 1.901E-01 2.796E-01 5.316E-02 2.00 2.747E-01 3.686E-01 1.013E-01 2.25 3.768E-01 4.590E-01 1.729E-01 2.50 4.884E-01 5.523E-01 2.697E-01 2.75 5.992E-01 6.539E-01 3.918E-01 3.00 6.992E-01 7.794E-01 5.449E-01 3.25 7.816E-01 9.669E-01 7.557E-01 3.50 8.443E-01 1.287E+00 1.087E+00 3.75 8.888E-01 1.802E+00 1.601E+00 4.00 9.184E-01 2.442E+00 2.243E+00 4.25 9.339E-01 2.911E+00 2.719E+00

Application Note 26 2008-08-01

4.50 9.350E-01 2.911E+00 2.722E+00 4.75 9.351E-01 2.911E+00 2.722E+00 5.00 9.351E-01 2.911E+00 2.722E+00 Table 2 nonlinear block characteristic data
4.50 9.350E-01 2.911E+00 2.722E+00 4.75 9.351E-01 2.911E+00 2.722E+00 5.00 9.351E-01 2.911E+00 2.722E+00 表 2 非线性块特性数据

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5 0 12 34 5 Vcomp

M1

M2

M1*M2

Figure 22 The characteristics of nonlinear block
图 22 非线性块的特性

3.3.4 Error Amplifier compensation G1(s)
3.3.4 错误放大器补偿 G1(s)

The circuit of error amplifier compensation circuit is shown in Figure 23. The sensing voltage Vsense is compared to internal reference voltage 3V typical. The difference between Vsense and internal reference is sent to transconductance error amplifier and converted to a current source to charge or discharge the RC components in Vcomp Pin.
误差放大器补偿电路的电路图如图 23 所示。Vsense 检测电压与内部参考电压 3V 典型值进行比较。Vsense 与内部参考电压之间的差值被发送到跨导误差放大器并转换为电流源，以对 Vcomp 引脚上的 RC 组件进行充电或放电。

Figure 23 Error Amplifier compensation G1(s) The transfer function is:
Figure 23 错误放大器补偿 G1(s) 转换函数是：

Application Note 27 2008-08-01

1 32

324 32

241 1 1 )1()(

1)( OTA sense
1)( OTA 感觉

OTA OTA

comp sense

comp g CC CCRssCC

CsR V I I V V VsG ⋅ +++

+=∆ ∆⋅∆ ∆=∆ ∆= (54) where, gOTA1 is the trans-conductance of OTA1, 42uS typically for ICE2PCS02. With

24 2 1 CRf CZ π = and
24 2 1 CRf CZ π = 和

32

324 2

1 CC CCRf CP

+

= π ,

)21()(

)21( )(

32

1 1 CP

CZ OTA

fssCC fsg sG π

π ++

+ = (55) The pole and zero are to regulate th e overall voltage loop with the cr oss-over frequency below 100Hz and create the phase margin for the loop stability.
+ = (55) 该极点和零点用于在交叉频率低于 100Hz 时调节整体电压环路，并为环路稳定性创建相位裕量。

3.3.5 Feedback G4(s)
3.3.5 反馈 G4(s)

The Feedback block is a simple voltage divider to moni tor the bulk capacitor output voltage. The circuit is shown in Figure 24.
The Feedback 块是一个简单的电压分压器，用于监测主电容输出电压。该电路如图 24 所示。

21

2 4 )( RR R V VsG

out

sense +=∆ ∆= (56) Figure 24 bulk voltage sensing divider

3.3.6 Overall Open Loop Transfer Function GV(s)
3.3.6 整体开环传递函数 GV(s)

With combining all of the blocks above, the overall open loop gain for voltage loop is equal to: )()()()()( 4231 sGsGsGsGsG NONV = (57) Due to PF requirement, inherent PFC dynamic volta ge loop compensation is always implemented with low bandwidth in order not to make the response for 2*f L ripple. For example, for 50Hz AC line input, PFC voltage loop bandwidth is normally set below 20Hz. The compensation circuit R4, C2 and C3 are used to optimize the loop gain and phase margin.
通过结合上述所有模块，电压环的开环增益等于：)()()()()( 4231 sGsGsGsGsG NONV = (57) 由于 PF 要求，固有的 PFC 动态电压环补偿总是采用低带宽以避免对 2*fL 纹波的响应产生影响。例如，对于 50Hz 交流输入，PFC 电压环带宽通常设置在 20Hz 以下。补偿电路 R4、C2 和 C3 用于优化环路增益和相位裕度。

3.3.7 Enhance dynamic response
3.3.7 提高动态响应

R1

R2

Vout Vsense

Application Note 28 2008-08-01

As mentioned in Section 4.6, the inherent low bandwidth of voltage loop in PFC application will lead to slow response in case of sudden load step and result in large output overshoot or drop. Enhance dynamic response feature is integrated in ICE2PCS02 to have a fast response in the case of load step. The voltage loop with including enhance dynamic response block is shown in Figure 25.
如第 4.6 节所述，PFC 应用中的电压环固有的低带宽会在突然的负载阶跃时导致响应缓慢，并导致较大的输出过冲或下冲。ICE2PCS02 集成了增强动态响应功能，以在负载阶跃时实现快速响应。包含增强动态响应块的电压环如图 25 所示。

Error Amplifier G1(s) Vref + Vcomp PWM Modulator G2(s) iL

Vsense

Vout Boost converter output Stage G3(s)
Vout Boost 变换器输出 级 G3(s)

Feedback G4(s)

-

Vin

5V

400V

0V

Vcomp_DC

Nonlinear block GNON(s) M1M2 + +/-
Nonlinear block GNON(s) M1M2 +/−

Enhance dynamic
增强动态

Figure 25 voltage loop block diagram including enhance dynamic response When Vsense voltage variation is within -5% to +5 % of nominal value, there is no function of enhance dynamic response block. However, when Vsense variatio n is out of such +/-5% range, enhance block will add offset voltage on top of Vcomp voltage to influence the current amplitude. The timing diagram of enhance dynamic response oper ation is shown in Figure 26 with sudden load jump situation. It can be seen that during enhance dynamic operation, the high current of boost choke is delivered for fast response. Within half sinusoidal period, when Vsense operating around the boundary of -5% threshold, the first part of boost choke current follows high amplitude profile due to enhance mode offset and the rest of boost choke current come back to lo w amplitude profile without enhance mode offset. When Vsense voltage is pulled back within +/-5% range, enhance dynamic offset disappear and boost choke current waveform will stay as perfect sinusoidal shape. enhance
Figure 25 电压环路框图包括增强动态响应 当 Vsense 电压变化在名义值的±5%范围内时，增强动态响应模块没有功能。然而，当 Vsense 变化超出这样的±5%范围时，增强模块会在 Vcomp 电压上添加偏置电压，影响电流幅度。增强动态响应操作的时序图如图 26 所示，在突然负载跳变情况下。可以看到，在增强动态操作期间，Boost 电感的高电流被提供以快速响应。在半个正弦周期内，当 Vsense 在-5%阈值附近运行时，Boost 电感电流的第一部分由于增强模式偏置而遵循高幅度轮廓，其余部分则恢复到低幅度轮廓，没有增强模式偏置。当 Vsense 电压拉回到±5%范围内时，增强动态偏置消失，Boost 电感电流波形将保持为完美的正弦波形。增强

Vin Iin

Pin Pin_ave

Ichg Ichg_ave

Vout Vout_ave nominal

0 0 0

- 5%

Normal Normal

Vcomp

Figure 26 timing diagram for enhance dynamic operation
增强动态操作的定时图 Figure 26

3.4 Design Example
3.4 设计示例

Assuming a 300W application with universal input AC voltage 85~265VAC, constant power load efficiency=90%
假设是一个 300W 的应用，输入交流电压为 85~265VAC，恒功率负载效率=90%

Application Note 29 2008-08-01

Vout=400VDC Cout=220uF/450V fSW=125kHz Rsense=0.1ohm Boost choke inductance L=1.2mH (please note that the inductance may change at different choke current) Vsense divider: R1=390kohm*2=780kohm, R2=6kohm
Vout=400VDC Cout=220uF/450V fSW=125kHz Rsense=0.1 欧姆 Boost 电感 L=1.2mH （请注意电感值可能在不同的电感电流下会有所不同）Vsense 分压器：R1=390k 欧姆*2=780k 欧姆，R2=6k 欧姆

3.5 Vcomp and M1, M2 value at full load condition
3.5 Vcomp 和 M1、M2 值在满载条件下

(1) 85VAC: RMS AC input current under full load:
(1) 85VAC: 全负载时的 RMS 交流输入电流：

AV PI

inrms

out rmsL 92.3859.0 300

85_ 85__ =⋅=⋅= η (58) From equation (43), With 34.4= FQ K and 4 1 = K from the ICE2PCS02 Datasheet,
85_ 85__ =⋅=⋅= η (58) 从方程(43)中，With 34.4= FQ K 和 4 1 = K 从 ICE2PCS02 数据手册。

70.18534.4 4001.0492.3

85_

185__ 8521 =⋅ ⋅⋅⋅==

inrmsFQ

outsensermsL VAC VK VRKIMM (59) From table 2 and Figure 22, it can be obtained Vcomp M1 M2 M1*M2 3.75 8.888E-01 1.802E+00 1.601E+00 4.00 9.184E-01 2.442E+00 2.243E+00 With Linear approximation:
outsensermsL VAC VK VRKIMM (59) 从表 2 和图 22 中可以得到 Vcomp M1 M2 M1*M2 3.75 8.888E-01 1.802E+00 1.601E+00 4.00 9.184E-01 2.442E+00 2.243E+00 用线性近似：

VV

VVMMMM

MMMM VV

comp

compcomp VcompVcomp

VcompVAC compcomp

79.3)75.34(601.1243.2 601.170.175.3

)(

85_

1_2_ 1_212_21

1_218521 1_85_

=−⋅− −+=

−⋅−

− += (60)

894.0)75.379.3(75.34 889.0918.0889.0

)(

851

1_85_ 1_2_

1_12_1 1_1851

=−⋅− −+=

−⋅− −+=

VAC

compcomp compcomp VAC

M

VVVV MMMM (61)

91.1)75.379.3(75.34 802.1442.2802.1

)(

852

1_85_ 1_2_

1_22_2 1_2852

=−⋅− −+=

−⋅− −+=

VAC

compcomp compcomp VAC

M

VVVV MMMM (62) The small signal gain of nonlinear block is
VVVV MMMM (62) 非线性块的小信号增益是

568.275.34 601.1243.2)(

1_2_

1_212_21 85 =− −=−

− =

compcomp

VcompVcomp VACNON VV

MMMM sG (63) The inherent pole of f23 is

Application Note 30 2008-08-01

Hz VMMK CVRK f

inrmsVACFQ

outAVEoutsense VAC 54.1 )( 2

1

2 85_8521

3 _1 8523 = ⋅⋅

= π

(64) (2) 265VAC RMS AC input current under full load:
(64) (2) 265VAC RMS AC 输入电流（满载）：

AV PI

inrms

out rmsL 257.12659.0 300

265_ 265__ =⋅=⋅= η (65) From equation (43),
265_ 265__ =⋅=⋅= η (65) 从方程(43)，

175.026534.4 4001.04257.1

265_

1265__ 26521 =⋅ ⋅⋅⋅==

inrmsFQ

outsensermsL VAC VK VRKIMM (66) From table 2 and Figure 22, it can be obtained Vcomp M1 M2 M1*M2 2.25 3.768E-01 4.590E-01 1.729E-01 2.50 4.884E-01 5.523E-01 2.697E-01 With Linear approximation:
outsensermsL VAC VK VRKIMM (66) 从表 2 和图 22 中可以得到 Vcomp M1 M2 M1*M2 2.25 3.768E-01 4.590E-01 1.729E-01 2.50 4.884E-01 5.523E-01 2.697E-01 用线性近似：

VV

VVMMMM

MMMM VV

comp

compcomp VcompVcomp

VcompVAC compcomp

255.2)25.25.2(1729.02697.0 1729.0175.025.2

)(

265_

1_2_ 1_212_21

1_2126521 1_265_

=−⋅− −+=

−⋅−

− += (67)

386.0)25.2266.2(25.25.2 3768.04884.03768.0

)(

2651

1_265_ 1_2_

1_12_1 1_12651

=−⋅− −+=

−⋅− −+=

VAC

compcomp compcomp VAC

M

VVVV MMMM (68)

461.0)25.2255.2(25.25.2 459.05523.0459.0

)(

2652

1_265_ 1_2_

1_22_2 1_22652

=−⋅− −+=

−⋅− −+=

VAC

compcomp compcomp VAC

M

VVVV MMMM (69) The small signal gain of nonlinear block is
VVVV MMMM (69) 非线性块的小信号增益是

3872.025.25.2 1729.02697.0)(

1_2_

1_212_21 265 =− −=−

− =

compcomp

VcompVcomp VACNON VV

MMMM sG (70) The inherent pole of f23 is

Hz VMMK CVRK f

inrmsVACFQ

outAVEoutsense VAC 54.1 )( 2

1

2 265_26521

3 _1 26523 = ⋅⋅

= π

(71)

Application Note 31 2008-08-01

3.5.1 Current Averaging Circuit
3.5.1 当前平均电路

With gOTA2=1.0mS from Datasheet, M1@85VAC, and assuming fAVE=13kHz which is 10 times less than switching frequency 125kHz, then

nFE E fK MgC

AVE

VACOTA icomp 332424 895.030.1 2 1

8512 =⋅⋅ ⋅−=⋅≥ ππ (72) Select Cicomp=3.3nF

3.5.2 Current Loop Regulation
3.5.2 当前环路调节

Insert M1 and M2 value in equation (40). The amplitude and phase angle of G C(s) is shown in Figure 27 to verify the stability of current loop and the requirement of fC less than switching frequency.
插入 M1 和 M2 值到方程(40)中。G C(s)的振幅和相角如图 27 所示，以验证电流环的稳定性以及 fC 小于开关频率的要求。

10 0 10 1 10 2 10 3 10 4 10 5 10 6 10 7 -150

-100

-50

0

50

100

f(HZ)

Gain(db)
增益(db)

85VAC full load 265VAC full load
85VAC 满载 265VAC 满载

Application Note 32 2008-08-01

10 0 10 1 10 2 10 3 10 4 10 5 10 6 10 7 -180

-170

-160

-150

-140

-130

-120

-110

-100

-90

f(HZ)

Phase Angle
相位角

85VAC full load 265VAC full load
85VAC 满载 265VAC 满载

Figure 27 The bode plot and phase angle for current loop The cross over frequency and phase margin are 3kHz and 75º for 85VAC, and 10kHz and 25º for 265VAC.
Figure 27 电流环的伯德图和相角 在 85VAC 时截止频率和相位裕量为 3kHz 和 75º， 在 265VAC 时为 10kHz 和 25º。

Application Note 33 2008-08-01

3.5.3 Voltage Loop Regulation
3.5.3 电压回路调节

From the above sections, it can be obtained:
从上述部分可以得到：

)21()(

)21( )(

32

1 1 CP

CZ OTA sense
CZ OTA 感应

comp

fssCC fsg V VsG π

π ++

+ =∆ ∆= (73)

comp NON V MMsG ∆ ∆= )()( 21 (74)

23

21

_ 21 23

21)()( f s MM V MM VsG

AVEout out

π + =∆ ∆= (75)

0077.0.2.806 2.6)(

21

2 4 ==+=∆ ∆= RR R V VsG

out

sense (76) The open loop gain for voltage loop is to times all above factors together as: )()()()()( 4231 sGsGsGsGsG NONV = G1(s) is used to provide enough phase margin and also limit the bandwidth below 20HZ. R4, C2 and C3 can be chosen as required. f CZ normally select to be compensate the pole in G23(s). f CP normally select to be 40~70Hz in order to fast put down the gain amplitude and reject the high frequency interference. In this example f 23 is around 1.54Hz at 85VAC/ 265VAC and full load. So the initial target is: f CZ is chosen to be close to 1.5Hz, and fCP is chosen to be 50Hz. C2 and C3 is calculated to obtain Gv(s) cross over frequency around 10Hz. The gain amplitude of GNON*G23*G4 in 85VAC and full load is shown in Figure 28. It can be seen that at f=10Hz, the gain is about - 4.52dB. So G1 should provide the gain +4.52dB at f= 10Hz. Considering that C2>>C3 due to fcz<fcp and 10Hz>>1Hz=fCZ, then
sense (76) 电压环的开环增益是将所有上述因素相乘得到的：)()()()()( 4231 sGsGsGsGsG NONV = G1(s) 用于提供足够的相位裕度，同时限制带宽在 20HZ 以下。R4、C2 和 C3 可以根据需要选择。f CZ 通常选择以补偿 G23(s) 中的极点。f CP 通常选择在 40~70Hz 以快速降低增益幅度并拒绝高频干扰。在这个例子中，f 23 在 85VAC/265VAC 和满载时约为 1.54Hz。因此，初始目标是：f CZ 选择接近 1.5Hz，fCP 选择为 50Hz。C2 和 C3 计算以使 Gv(s) 的交叉频率约为 10Hz。在 85VAC 和满载时，GNON*G23*G4 的增益幅度如图 28 所示。可以看出，在 f=10Hz 时，增益约为-4.52dB。因此，G1 应在 f=10Hz 时提供+4.52dB 的增益。考虑到由于 fcz>1Hz=fCZ，因此

F Hz Hz Hz C

dBHzC HzHzg HzG OTA

µ

π

π

69.3 10210 1 101039

52.4102 110 )10(

2052.4

6 2

2

1 1

= ⋅⋅

⋅⋅ =

+=⋅⋅=

− (77) 3.97uF is not common for ceramic type capacitor. So select C2=1uF, then fCZ is recalculated as:
− (77) 3.97uF 对于陶瓷电容来说并不常见。所以选择 C2=1uF，然后重新计算 fCZ 为：

Application Note 34 2008-08-01

Hz HzF

Hzf

dBHzC fHzg HzG

CZ

CZ OTA

30.4 11039 102101

10

52.4102

)10(1 )10(

2 6

2052.4

2

2 1 1

= −  

   

 ⋅ ⋅⋅⋅ =

+=⋅⋅

+ =

− πµ

π (78) according to HzCRf CZ 30.42 1
π (78) 根据 HzCRf CZ 30.42 1

24 == π then

Ω=⋅⋅= kCHzR 3730.42 1

2 4 π (79) select R4=33k Ω , and HzCR CC CCRf CP 502 1 2

1

34 32

324 =≈ +

= ππ

nFRHzC 5.96502 1

4 3 =⋅⋅= π (80) select C3=100nF The gain amplitude and phase angle of overall voltage loop G V(s) at 85VAC and 265VAC in full load condition is shown in Figure 28 and Figure 29. At 85VAC, the cross over frequency fV is around 9.5Hz and the phase margin is about 63º. At 265VAC, the cross over frequency fV is around 14Hz and the phase margin is about 62º.
4 3 =⋅⋅= π (80) select C3=100nF 在满载条件下，整体电压环路 G V(s) 在 85VAC 和 265VAC 时的增益幅度和相角如图 28 和图 29 所示。在 85VAC 时，截止频率 fV 约为 9.5Hz，相位裕度约为 63º。在 265VAC 时，截止频率 fV 约为 14Hz，相位裕度约为 62º。

Application Note 35 2008-08-01

10-1 100 101 102 103 104 -120

-100

-80

-60

-40

-20

0

20

40

60

f(HZ)

Gain(db)
增益(db)

Gv=G1*Gnon*G23*G4 Gnon*G23*G4

10-1 100 101 102 103 104 -180

-170

-160

-150

-140

-130

-120

-110

-100

-90

f(HZ)

Phase Angle
相位角

Gv

Figure 28 the bode plot and phase angle for voltage loop at 85VAC and full load
Figure 28 85VAC 和满负载时电压环的伯德图和相角

Application Note 36 2008-08-01

10 -1 10 0 10 1 10 2 10 3 10 4 -120

-100

-80

-60

-40

-20

0

20

40

60

f(HZ)

Gain(db)
增益(db)

10 -1 10 0 10 1 10 2 10 3 10 4 -180

-170

-160

-150

-140

-130

-120

-110

-100

-90

f(HZ)

Phase Angle
相位角

Figure 29 The bode plot and phase angle for voltage loop at 265VAC and full load
Figure 29 265VAC 和满载时电压环的伯德图和相角

Application Note 37 2008-08-01

References [1] Infineon Technologies: ICE2PCS01 - Standalone Powe r Factor Correction Controller in Continuous Conduction Mode; Preliminary datasheet; Infineon Technologies; Munich; Germany; Sept. 2007. [2] Infineon Technologies: ICE2PCS02 - Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode (CCM) at Fixed Frequenc y, Preliminary datasheet; Infineon Technologies; Munich; Germany; Sept. 2007. [3] Luo Junyang, Liu Jianwei, Jeoh Meng Kiat, 300W CCM PFC Evaluation Board with ICE2PCS02, CoolMOS™ and SiC Diode thinQ!™, Application note, Infineon Technologies, Munich, Germany, Feb. 2007. [4] Luo Junyang, Liu Jianwei, Jeoh Meng Kiat, IC E2PCSxx, New generation of BiCMOS technology, Application note, Infineon Technologies, Munich, Germany, Feb, 2007 [5] Luo Junyang, Liu Jianwei, Jeoh Meng Kiat, ICE1PCS01 Based Boost Type CCM PFC Design Guide - Control Loop Modeling, Application note, Infineon Technologies, Munich, Germany, May, 2007. [6] Luo Junyang, Liu Jianwei, Jeoh Meng Ki at, ICE1PCS01/02 Boost Type CCM PFC Design with ICE1PCS01. Application note, Infineon Technologies, Munich, Germany, Apr. 2007.
References [1] Infineon Technologies: ICE2PCS01 - 独立功率因数校正控制器，连续传导模式；初步数据表；Infineon Technologies；慕尼黑；德国；2007 年 9 月。 [2] Infineon Technologies: ICE2PCS02 - 独立功率因数校正（PFC）控制器，连续传导模式（CCM）固定频率，初步数据表；Infineon Technologies；慕尼黑；德国；2007 年 9 月。 [3] 罗俊阳，刘 Jianwei，Jeoh Meng Kiat，使用 ICE2PCS02 的 300W CCM PFC 评估板，CoolMOS™和 SiC 二极管 thinQ!™，应用说明，Infineon Technologies，慕尼黑，德国，2007 年 2 月。 [4] 罗俊阳，刘 Jianwei，Jeoh Meng Kiat，ICE2PCSxx，BiCMOS 新技术，应用说明，Infineon Technologies，慕尼黑，德国，2007 年 2 月。 [5] 罗俊阳，刘 Jianwei，Jeoh Meng Kiat，基于 ICE1PCS01 的升压型 CCM PFC 设计指南 - 控制回路建模，应用说明，Infineon Technologies，慕尼黑，德国，2007 年 5 月。 [6] 罗俊阳，刘 Jianwei，Jeoh Meng Kiat，使用 ICE1PCS01/02 的升压型 CCM PFC 设计。应用说明，Infineon Technologies，慕尼黑，德国，2007 年 4 月。