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Astera Labs IPO – The Next Connectivity Superhero or Steamrolled By Competition?

Bottoms Up Model, Units, ASP, Revenue, By Hyperscaler Analysis, EPS & Cashflow, Competitive Analysis

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4 comments on Astera Labs IPO – The Next Connectivity Superhero or Steamrolled By Competition?

Bottoms Up Model, Units, ASP, Revenue, By Hyperscaler Analysis, EPS & Cashflow, Competitive Analysis

The gold rush for AI infrastructure is creating huge opportunities for the companies supplying enabling technologies. Not everyone is an Nvidia in this infrastructure build out bonanza, there are many small key players too. Today we’ll dive into Astera Labs, whose chips have been silently shipped in more than 80% of AI servers.

Astera Labs is a datacenter connectivity pure-play and targets mainly 3 customer types: hyperscalers, AI accelerator vendors, and system OEMs. Astera Lab’s product portfolio is currently comprised of 3 families: Aries retimers, Taurus active electrical cable (AEC) paddle board modules, and Leo CXL Memory Controllers. We have previously covered some of markets in which it operates, most notably CXL and AECs.

Astera Labs

Connectivity is historically an extremely competitive, but sticky high margin portion of the datacenter market. Despite numerous attempts at competition in switching and DSPs, Broadcom and Marvell have been able to dominate with more than 80% revenue share at >65% gross margins.

The top question everyone has been asking is if Astera Labs caught lightning in a bottle by being early, or if the the first movers advantage doesn’t matter and competitors will come in and steamroll them. We will discuss the main competitors in all major markets they operate in, including Marvell Technologies, Broadcom, Montage Technology, Parade Technologies, Rambus, Microchip, XConn, and Credo. Astera Labs could fade away, or they could become the next connectivity Superhero if they maintain high retimer market share and expand into AEC and various CXL products.

In this report, we will share forecasts for revenue, EPS, market size, etc. Our approach is built from the bottoms up with ASP and volumes for these markets based on per firm/types of AI accelerator and CPU shipments. We take into account per hyperscaler wins/share for the connectivity products long term.

Before getting to that, let’s first review Astera Lab’s history.

How Astera Labs Is Solving The Connectivity Bottleneck

Astera Labs was established in 2017 in a garage, in typical Silicon Valley fashion. The co-founders, Jitendra Mohan, Sanjay Gajendra, and Casey Morrison, were at Texas Instrument’s High Speed Interface business. They saw the world with increasing connectivity bottlenecks, due to the exponential growth in compute and the need for heterogenous computing driven by AI workloads and Hyperscale Cloud Computing.

Astera Labs is in the business of removing bottlenecks, wherever they appear in a system

Jitendra Mohan

The below image shows 3 major bottlenecks that Astera Labs aims to solve.

Astera Labs

The main focus for the company was initially PCIe and related protocols, such as CXL. PCIe 4.0 specs was released in 2017, and for the first time defined formally the terms “redriver” and “retimer”. A redriver is essentially an analog signal amplifier device, to counteract the frequency-dependent attenuation caused by the PCB.

In simple terms it boosts the signal, think a “megaphone”. The major disadvantage of a redriver is that it also amplifies noise that is in the signal path. This worked well enough for PCIe Gen 1 to Gen 3 but started causing challenges at Gen 4, with Gen 5’s faster data rates exacerbating this further. The image below shows the loss per inch across various PCIe generations and PCB materials.

Planet Analog

To compensate for signal losses, the preferred option was to use higher quality PCB Materials, but this comes at a high cost. For example, the PCB material “Megtron 6” is about seven times the cost of the PCB material “FR4”, the most popular and cost-effective material.

Keep in mind that PCIe specifications have a precise insertion loss budget; in the case of PCIe 5.0, this is 36 dB bump-to-bump for 32 GT/s with a bit error rate less than 10^-12.

Astera Labs

Astera Labs was based on solving the connectivity challenges of PCIe 4 and 5 (specs out in 2019). They built a company around solving these signal integrity challenges and designing a retimer based solution. A retimer is a mixed-signal digital/analog device that is protocol-aware and can fully recover the data, extract the embedded clock and retransmit a fresh copy of the data using a clean clock.

In simple terms, instead of a “megaphone” like the redriver, this is a high quality microphone + dedicated audio equipment feeding the corrected signal to speakers to speakers. The retimer is a small chip performing PCIe SerDes functions as well as monitoring and data collection about the singal integrity. The below diagram illustrates a typical architecture.

PCI-SIG

A retimer enables the signal to be split into two channels, significantly reducing the channel loss. The below diagram shows how these chips are integrated to PCBs. This also illustrates how low-loss PCBs, and even ultra-low-loss PCBs, may not be sufficient to have the required channel loss.

PCI-SIG

Astera Labs was first to market with their Aries Smart Retimer for PCIe 4.0 as well as PCIe 5.0 and securing their first design wins in 2019. Volume production started in 2020, using a TSMC process and in 2021, the company generated revenue of $34.8M. They have a good set of investors such as Fidelity, Atreides Management, Intel Capital, and Sutter Hill Ventures. Their last round before this public offering was following a rejected acquisition offer from Marvell.

Astera has unveiled a vision to offer a global connectivity platform and launched two more product lines: the CXL Memory Controller, and the Smart Cable Module. The below diagram gives an illustration of Astera Lab’s vision.

Astera Labs

In 2023 started on the wrong path, with weak and declining Q1 and Q2 dragged down by an inventory correction affecting the general purpose datacenter & networking markets, driven by the cloud crisis of their largest hyperscaler customer. But this was not the end of the story, with Q3 2023 and Q4 2024 showing explosive growth. So, what happened there, and is this sustainable?

Astera Labs Form S-1

To answer this, let’s dive more into the Aries product family, and their main applications.

Aries Retimers for AI and Cloud applications

The short answer is yes: as AI accelerator demand continues to fire, the PCIe retimer market will grow too. Indeed, inside each accelerator card is included a retimer. Additional retimers can be found in the server head node, as shown in the image below. The main customers here are AI accelerator vendors and server ODMs.

Astera Labs

The reason retimers are so popular in accelerated computing systems is Signal Reflection. Alongside distance, this is the second major cause of signal loss in PCB traces or cables. To put it simply, GPU systems are very dense: the above image shows how a baseboard (for example the Nvidia HGX) can include 8 GPUs. Such density induces signal challenges and requires PCIe re-timers. AI servers can include retimers both on the Accelerator baseboard and on the attached Server Head Node. The precise number of units per GPU varies depending on various factors, such as PCB and design layout, and we’ll share our estimates later in the report for subscribers. Different hyperscalers designs contain different numbers of retimers.

Astera Labs’s first major customer was actually Amazon for “typical” (non-AI) cloud workloads. In some instances, Aries retimers can help Cloud Service Providers achieve lower TCO than alternatives for high data rates. The below image shows where retimer can be found within IT equipment.

ServeTheHome

Another upcoming driver for Aries is CXL, a protocol built on top of PCIe. As explained in our deep dive, CXL adoption for Memory Pooling will lead to an increasing need for CXL switches, which will require then retimers. Of course we are not that bullish on that topic.

Now that we’ve covered the basics, the majority of this report will explore the strength of Astera Labs’ moat and dive into the other major product lines. We will cover growth, ASP, competition, gross margin and more. We will also share forecasts through 2027 from revenue down to free cash flow. We take into account Astera’s differing levels of penetration by platform and hyperscaler to model units for each product line for each hyperscaler.

Retimer Market & Key Customers

Astera Labs has two key customers for this business: Amazon and Nvidia. As previously explained, nearly every AI server in the market includes Astera Labs Aries retimers. We estimate that every GPU has roughly 1.5 retimers attached, but this varies across server designs. Certain hyperscalers deploy as many as 18 while others have only 8 retimers. Usually, the accelerator baseboard has 1 retimer per GPU (Nvidia/AMD being the customers from a financial standpoint), and there are additional units on the server side, found on the switch tray or CPU tray. Below is an image of Meta’s Grand Teton server.

Meta

We don’t expect the retimer-to-GPU ratio to change much going forward. While people can skimp on the CPU tray and switch tray side with Gen 5 and won’t be able to with Gen 6, there are also some features on ConnectX and Enfabrica based solutions that let you stay with the current ratios, meaning that retimer volume growth is directly linked to AI GPU growth.

On the broader accelerator market this is not necessarily true though, as not all custom silicon includes retimers today. As an example, Google’s TPU does not contain many PCIe retimers, but Amazon’s Trainium and Inferentia do. Our Astera Labs revenue forecasts are based on our SKU-by-SKU accelerator model.

Regarding ASPs, we estimate that each PCIe 5.0 retimer is worth roughly ~$30 for high volume hyperscaler sales. Astera Labs uses a TSMC N16 manufacturing process but will shift to N5 for their latest product, the Aries 3 retimer for PCIe 6.x. We think a 80% ASP increase is likely, based on what we have observed on other similar types of products. This is despite the large increase in competitiveness due to Broadcom entering the market.

Will Broadcom kick Astera Labs off this market?

Since Broadcom’s announcement of their PCIe Gen 6 retimer launch, we saw many erroneous takes on the likely impact on market shares. In our view, the high-speed networking business is generally a good place to be, and being the first mover and having the largest installed base matters a lot.

We think Inphi is a very relevant comparison: despite fighting for a long time against industry giants such as Broadcom, Inphi managed to keep its leadership in high-speed optical DSPs and remains the leader today, with ~70% market share. Three years and a half have passed, Marvell has acquired the company for 10B$, but market share remains very elevated. Inphi is the largest individual business within Marvell today, and the core driver of their current valuation premium.

In our view, Astera Labs could benefit from the same moat. PCIe is a messy protocol, requiring backwards compatibility all the way to Gen 1. Many different device types are connected though that interface, often with different SerDes IP, and a retimer must connect with all of them and keep signal integrity. This requires long and hard work with the hardware ecosystem.

Qualification is a heavy and difficult process, as illustrated with multiples failed attempts by competitors Parade Technologies and Montage Technology, who are still not shipping in meaningful volume. We don’t believe they will be able to compete in a meaningful way going forward either. Montage won’t ever make it into AI servers because they are a China supplier. Parade is even worse off becuase their chip has very little in the way of feature set. Furthermore, Parade rolled the dice by using their own SerDes which means interoperability is not anywhere close to being achieved. Astera on the other hand is interoperable with the entire industry’s PCIe SerDes and controllers.

Of course, Broadcom is a different animal. They have some the world’s best SerDes IP, a key part of their design wins at Google, versus Astera Labs licensing inferior IP from Synopsys. Astera isn’t just taking off the shelf, there are some purpose built modifications. Broadcom dominates the PCIe switch market and is pushing the narrative of being the only provider of a full system.

Broadcom

While compelling on paper, we think this is not enough to take share from Astera Labs at all players. Inphi is again a good comparison, as the optical switching market is largely dominated by Broadcom, but its attempt to take over the DSP market did not get such success. As shown in the below table, Astera Labs’ latest product has the same specifications as Broadcom’s, but with slightly lower (claimed) power consumption. To be clear, the paper specs may be quite different to real world specs, which are only known by customers evaluating these products. With that said, both Amazon and Nvidia are going to remain majority share with Astera Labs for PCI gen 6 qualifications.

Astera Labs

We think this technical superiority is likely due to the installed base advantage. Astera Labs has included telemetry features in their chips, and leverages this data through their software platform, COSMOS. While we think Broadcom can provide the same features, in our view, the first-mover advantage of Astera Labs is giving it a better intrinsic knowledge of customer requirements and physical interfaces.

Furthermore, Nvidia wants to work with Broadcom as little as possible which is a huge benefit for Astera Labs long term, because they view Astera Labs as a long term enabler not a competitor. We think that moat is strong enough to keep dominating this market, especially in the analog world where design is more art than science.

Astera Labs

The Amazon/Astera Labs relationship

Amazon has historically been Astera Labs’ largest customer, and while we expect this to change going forward, the relationship deserves some analysis. First, Astera Labs has always had a cloud-first approach, and in 2019, joints statements from Astera Labs, AWS and Synopsys proudly shared that the start-up was the “industry-first” to rely 100% on Cloud EDA tools, hosted on, you guessed it, AWS.

Various media articles depicted Astera Labs as the revolutionary cloud-based semiconductor startup with record time-to-market, giving good publicity to AWS. In the S1 filing, we learn that in December 2022, Astera Labs entered into a cloud services agreement for 3 years with a vendor, mostly for hosting services related to chip design. This includes a $2M minimum purchase in 2024 and 2025: these are of course small numbers for AWS, but this kind of commitment helps cement a strong relationship.

The warrant agreement also deserves a few words. In October 2022, Astera Labs issued a warrant to Amazon to purchase up to 1.48M shares at $20.34 (valuation of the Series D round) per share with a 7-year exercise period. These shares will be vested once Amazon purchases a up to $400M worth of products (Aries, Taurus, Leo). There are specific tranches of payment in this agreement, and since October 2022, 0.23M shares have been vested. Another warrant was issued in October 2023, with the same exercise price and exercise period, for an additional 0.83M shares if Amazon buys up to $250M worth of products.

To put it more simply: the more Amazon buys from Astera, the more warrants it gets, the higher the incentive to make Astera Labs grow and buy from product from them. On paper, this is a win-win (except for short-term focused shareholders). Unlike a typical customer discount, cash revenue is not reduced, and the customer is incentivized for the long term.

All of this illustrates the special Amazon/Astera Labs relationship. This is a similar arrangement Alphawave and Credo have with Amazon as well, but those are far less “in the money”. They were (and remain) the first hyperscaler to deploy massively PCIe Gen 4 and Gen 5 retimers for non-AI workloads. We dived into Amazon’s hardware stack here and here, and in our view, the relationship will likely continue to grow for non-AI workloads, driven by PCIe Gen 6 deployments. Amazon is the most aggressive firm on PCIe Gen 7 and that bodes well for Astera Labs as well.

Furthermore, we expect Astera Labs to launch a small to mid-sized cost optimized PCIe/CXL Switch for Gen 6 and Gen 7, specifically tailored to Amazon workloads, such as its Nitro DPU and Graviton CPU. While this is not contributing on the short term, we view this as a >$50M business for Astera Labs, driven by the ~1 million Graviton CPUs annual deployments. Between Broadcom switches on the high end and Astera Labs on the low end, we don’t see Microchip, Xconn, or others being able to penetrate the switch market.

The Active Electrical Cable opportunity

Another exciting field for Astera Labs is AECs, addressed by the Taurus product family. An AEC is simply a copper cable that includes an Ethernet retimer on both ends. This allows extended reach for Direct Attach Copper (DAC) cables, which are widely deployed today but increasingly constrained by both required thickness and reach, due to high data rates. As we transition to 800G and 1.6T, these issues will exacerbate further and require either moving to optics or adopting an ethernet based approach.

Credo

In our estimates, AECs started being competitive at 400G. But in today’s AI clusters, most interconnection rely on optical fiber coupled with optical DSPs. This is partially due to Nvidia pushing hard for its Infiniband solutions which rely mostly on optical interconnects. We expect this to progressively shift over time, as TCO becomes the focus.

In this regard, AECs perform better than optical, as they consume lower power and are less expensive. The below table compares AECs to AOCs, which are fixed size optical cables with a DSP on both ends. The more commonly deployed optical fiber + pluggable DSP combination is even more expensive. In addition to cost and power, optical cables also have higher failure rates than copper. Credo estimates an annual failure rate of 0.9% for AOCs, close to 2 orders of magnitude higher than the <0.01% annual failure rate of AECs.

Credo

While compelling on paper, keep in mind that these advantages are not that large when compared to GPU cost and power consumption. We dived into the latter in our recent datacenter energy piece. But we think the difference will only get bigger and AECs should get increasingly competitive. In our view, 800G should be the tipping point. Given that AI clusters tend to adopt the highest data rates faster than standard CPU racks, we see AECs as a market driven by AI.

Can Astera Labs take share from established leaders?

The first mover in this market is Credo Technology Group. Despite having disappointed the market by exaggerating the size of AEC deployments at 200G and 400G, we expect this business will take off H2 2024. Both Credo and Marvell will benefit from this ramp, driven by Microsoft, Amazon and Google. Other involved companies include Broadcom, Maxlinear. They all compete in the broader optical DSP market and make their own SerDes IP. Astera Labs is the only company licensing IP from Synopsys. Point2, Spectra7, Macom, and Semtech are all entering this market as well.

The market size could reach billions, as in ToR topologies, every GPU is attached to a cable for NIC-to-ToR communication. The below image shows how GPU numbers translate into cables. We estimate that 400G AECs have average selling prices of ~$130, and will rise to ~$180 for 800G.

Nvidia DGX H100 Reference Architecture

In our view, Marvell and Broadcom will benefit most from this ramp, with Credo losing market share. The market will get competitive and should deliver lower margin than others. Astera Labs will try to leverage its PCIe retimer position and customer relationships such as Amazon, but we think it will remain a relatively niche player outside of their strong relationship with Amazon.

CXL update

Astera Labs was a first mover in CXL, as mentioned before, Astera got a buy out offer from Marvell that was rejected, and thats when Marvell turned to buying Tanzanite Silicon in 2022. They demonstrated the first CXL 2.0 Memory Accelerators with rack scale memory pooling and introduced their Leo platform in November 2021. They entered in pre-production in 2022 and started to ship in 2023. However, we are now in 2024, volumes are still very weak, and we see no imminent inflection point.

Memory pooling will disappoint, as most programs have been quietly delayed or cancelled, and CXL won’t benefit from AI deployments. Marvell’s program with Google likely doesn’t ramp meaningfully on CXL. On a medium term horizon, we expect CXL Memory Expansion to have decent adoption, but this should be slow and at lower volumes than the expectations set by some consultants.

On a brighter note, the market has gotten less competitive, with various players dropping their efforts including major memory manufacturers. Therefore, we think Astera Labs will capture most of the value from this market. We estimate ASPs for a Leo Memory Controller at ~$70, with each controller usually attached to 2 or 4 DIMMs. Montage, Rambus, and Microchip all had memory expansion devices, but Rambus and Microchip have bled a lot of talent/had some shake ups, and we still cant see US hyperscalers or OEMs buying from Montage in volume.

Valuation and Financials

Our model forecasts 59% revenue 2023-27 growth CAGR, driven by an explosive +167% YoY in 2024 related to massive Aries retimer deployments in AI clusters. We expect gross margins to remain very healthy, but other products will progressively ramp and dilute gross margin in our view, both due to lower markup and lower volumes on fixed costs (mostly mask depreciation and more tape outs).

SemiAnalysis Estimates

We estimate that operating margins go beyond 40% by 2027. Note that our numbers in the table below exclude one-offs such as the vesting of RSUs which should impact Q1 2024. The beauty of Astera Labs’ business model is that it outsources some key IP (SerDes), enabling very high operating leverage on a low fixed costs basis. While OPEX will continue to grow, we think Astera Labs already has a solid team (>260 employees) and customer relationships and does not need to invest substantially more.

Similarly, Free Cash Flow will grow tremendously, despite working capital drags related to inventory and accounts receivable growth. We aim for a basic non-GAAP EPS of $1.77 in 2027, which would value Astera Labs at 17x 2027 earnings. On a shorter term horizon, we estimate that at an IPO price of $30 per share, Astera Labs will trade at 47.3x 2024 earnings.

Therefore, we think Astera Labs has all the attributes loved by market participants. Their direct AI exposure is very attractive. Astera Labs will likely beat estimates all year, and could move up to a 20x to 25x CY2027. Buyers narratives will be that Inphi is the correct comp. Furthermore, we have very low share for AEC relatively and we aren’t really big bulls on the Leo ramp, so if we are wrong there, further gains could be had.

Moreover, with floating shares likely to remain at less than 15% of total shares outstanding. We see some parallels with the last big semiconductor IPO, ARM.