Power electronics’ packages involve layers of materials with different coefficients of thermal expansion (CTE), leading to thermomechanical stress during operation. Currently, to improve the thermal and electrical performance of power modules, bond wires are replaced by copper clip, printed circuit board (PCB), or ceramic substrate, which also increase the rigidity of the structure. The CTE mismatch between the materials of additional packaging layers can cause significant stress and lead to failures after long-term operation. This problem is more pronounced for SiC devices due to their high Young's modulus [1]. Furthermore, the small footprint of SiC mosfet die can increase the heat flux density significantly, causing higher thermal stress due to a high-temperature gradient [2]. It is reported in [3] that the number of cycles to failure is inversely correlated to the maximum von Mises stress in the solder layer. Therefore, reducing thermal stress is crucial for power modules.
电力电子的封装涉及具有不同热膨胀系数（CTE）的材料层，从而在操作期间产生热机械应力。目前，为了提高功率模块的热性能和电性能，键合线被铜夹、印刷电路板（PCB）或陶瓷基板取代，这也增加了结构的刚度。附加封装层的材料之间的CTE不匹配会导致显著的应力，并导致长期运行后的故障。由于SiC器件的高杨氏模量 [1] ，该问题对于SiC器件更为明显。此外，SiCMOSFET管芯的小尺寸可以显着增加热通量密度，从而由于高温梯度而导致更高的热应力 [2] 。在 [3] 中报告，失效循环次数与焊料层中的最大von Mises应力呈负相关。 因此，降低热应力对功率模块至关重要。

Studies on mitigating thermomechanical stress often focus on double-sided cooled modules [3], [4], [5], [6], [7], [8], [9]. These methods are based on low CTE/Young's modulus materials or stress-relieving structures. The application of low CTE materials includes molybdenum buffer [4], porous sintered silver interposer [5], and die attach [6]. Examples of stress-relieving structures include trenched copper plates [7], geometrically modified spacers [3], fuzzy buttons [8], and additional direct bonded copper plate as stress relaxation [9].
减轻热机械应力的研究通常集中在双面冷却模块 [3] 、 [4] 、 [5] 、 [6] 、 [7] 、 [8] 、 [9] 上。这些方法基于低CTE/杨氏模量材料或应力消除结构。低CTE材料的应用包括钼缓冲层 [4] 、多孔烧结银中介层 [5] 和管芯附着层 [6] 。应力消除结构的实例包括沟槽铜板 [7] 、几何形状修改的间隔物 [3] 、模糊按钮 [8] 和作为应力松弛的附加直接结合铜板 [9] 。

This letter proposes a novel “floating die” as a stress-relieving structure realized by liquid metal (LM) fluidic material. A flexible PCB (FPCB)/die/active metal brazed (AMB) substrate hybrid module is designed to demonstrate the feasibility of LM fluidic connection and floating die structure. PCB/die/ceramic substrate has been an attractive solution for power electronics packaging because it can combine the advantages of electrical integration of the PCB and heat dissipation of the ceramic substrate [10]. Moreover, the performance of PCB/ceramic hybrid design can be further exploited by combining it with double-sided cooling [11], embedded die structure [12], and nano-silver sintering [13]. However, previous studies on hybrid packaging solutions mainly focus on the design and optimization of thermal and electrical performance. Meanwhile, the high thermomechanical stress, resulting from both the increased number of layers and the diversity of materials used, has not been adequately investigated. Therefore, this letter takes an FPCB/die/AMB packaging stack as an example of implementing LM fluidic connection and floating die structure while maintaining its superior thermal and electrical performance.
这封信提出了一种新的“浮动模具”作为应力消除结构实现的液态金属（LM）流体材料。设计了一种柔性PCB（FPCB）/芯片/活性金属钎焊（AMB）基板混合模块，以验证LM流体连接和浮动芯片结构的可行性。PCB/管芯/陶瓷基板是电力电子封装的一种有吸引力的解决方案，因为它可以联合收割机结合PCB的电集成和陶瓷基板 [10] 的散热优点。此外，PCB/陶瓷混合设计的性能可以通过将其与双面冷却 [11] ，嵌入式模具结构 [12] 和纳米银烧结 [13] 相结合来进一步发挥。然而，之前对混合封装解决方案的研究主要集中在热性能和电性能的设计和优化上。 同时，由于层数的增加和所用材料的多样性而产生的高热机械应力还没有得到充分的研究。因此，这封信以FPCB/管芯/AMB封装堆叠为例，实现LM流体连接和浮动管芯结构，同时保持其上级热和电气性能。

The 3-D finite-element analysis (FEA) is used to model the thermomechanical stress incurred in the device package in Section III. To give an intuitive explanation of the cause of the stress in the device package, we can consider a simplified 1-D model of a power device die and its die-attach solder, which is commonly used in packaging for electrical and thermal interconnection, as shown in Fig. 1.
在第0节中，使用三维有限元分析（FEA）对器械包装中产生的热机械应力进行建模。为了直观地解释器件封装中应力的原因，我们可以考虑功率器件芯片及其芯片连接焊料的简化一维模型，该模型通常用于电气和热互连的封装，如图1所示。

Fig. 1.

Illustration of constrained strain and thermal stress.

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Assume that the die and solder are stress free at the initial reference temperature T_ref. When temperature T rises to higher values, the die is under tension and the solder is under compression, resulting in constrained strain that is expressed as follows:

View Source\begin{equation*} {{\varepsilon }_c} = \alpha \left( {T - {{T}_{\text{ref}}}} \right) - \frac{{\Delta L}}{L}. \tag{1} \end{equation*}

According to Newton's third law, the stress of the die and solder layer is equal and the directions are opposite; the constrained strain of the die and solder can be, respectively, solved. The resulting thermal stress is expressed as follows:

View Source\begin{align*} {{\sigma }_{\text{solder}}} =& {{\sigma }_{\text{die}}} = {{E}_{\text{solder}}} \cdot {{\varepsilon }_{c - \text{solder}}} = {{E}_{\text{die}}} \cdot {{\varepsilon }_{c - \text{die}}}\\ =& \frac{{({{\alpha }_{\text{solder}}} - {{\alpha }_{\text{die}}}) \cdot (T - {{T}_{\text{ref}}})}}{{1/{{E}_{\text{die}}} + 1/{{E}_{\text{solder}}}}} \tag{2} \end{align*}

This work eliminates constrained strains by decoupling the thermal strain of the SiC die from the AMB substrate using a floating die structure. This structure is formed by the frictional contact using LM for interconnection, instead of the conventional rigid connection.

LMs are types of alloys that keep in the liquid phase at room temperature. This nature, along with its high thermal and electrical conductivity, makes LMs receive increasing attention in soft electronics, robotics, and biomaterials [14]. Unlike the soldering or sintering process, which exposes devices to high temperatures and rigidly bonds them, LM can achieve interconnection at room temperature with a fluidic approach [15]. For power electronics, bismuth-based LM has been used to reduce the thermal resistance of a press-pack insulated gate bipolar transistor (IGBT) module [16], while liquid gallium was used as the top-side interconnection for a diode [17]. This letter fully utilizes the advantages of LMs with an embedded floating die structure. The SiC mosfet is floating on a layer of LM, which acts as the die attach instead of using rigid interconnection methods. The fluidic nature of LM can decouple the thermal strain of two different materials at the interface with an uncompromised electric and thermal conduction capability. The LM layer not only eliminates the thermomechanical stress of the die-attach layer but also reduces the shear stress between AMB and FPCB.

The rest of this letter is organized as follows. Section II presents the selection of LMs and the structure of the LM-based SiC packaging. Section III evaluates and compares the thermal stress of the LM-based packaging with its soldered counterpart. Section IV describes the fabrication process and experimental results. Finally, Section V concludes this letter.

Desirable LM should have relatively high electrical and thermal conductivities. A low melting temperature is preferable for keeping the floating structure. Table I compares the properties of different LMs. Mercury and Galinstan (Ga₆₈In₂₂Sn₁₀) have low melting points but less conductive and the toxicity of mercury is also problematic. In₅₁Bi_32.5Sn_16.5 has decent conductivities but the melting temperature (53 °C) is impractical. In this letter, an LM material composed of silver, indium, and gallium (GaInAg) is used. It has competitive thermal and electrical properties [thermal conductivity of 75 W/(mK) and electrical conductivity of 5×10⁶ S/m] compared with SAC 305 solder. In addition, GaInAg is a nontoxic material with a relatively low melting point of 8 °C making it a feasible interconnection material at room temperature.
理想的LM应该具有相对高的电导率和热导率。为了保持浮置结构，优选低的熔融温度。表0#比较了不同LM的特性。汞和Galinstan（Ga₆₈ In₂₂ Sn₁₀）的熔点低，但导电性差，汞的毒性也是个问题。In₅₁ Bi_32.5 Sn_16.5具有良好的导电性，但熔化温度（53 °C）是不切实际的。在这封信中，使用由银、铟和镓（GaInAg）组成的LM材料。与SAC 30 5钎料相比，该钎料具有较好的热性能和电性能（热导率为75 W/（mK），电导率为5×10^6S/m）。此外，GaInAg是一种无毒材料，具有相对较低的8 °C熔点，使其成为室温下可行的互连材料。

TABLE I Comparison of Different LMs and Solder
表I不同LM和焊料的比较

The selection of GaInAg also considers die metallization and the coating of AMB substrate used in this study. The drain of the SiC mosfet (SCT116N120G3DXAG, 1200 V, 130 A) from STMicroelectronics is Ti/Ni/Ag, which exhibits chemical stability when in contact with gallium in the GaInAg LM. Also, this drain metallization is commonly used for power electronic devices. The AMB substrate is plated with silver. This ensures good wettability with the silver-based GaInAg-LM, allowing effortless LM printing on the surface of AMB and die metallization, and reducing the thermal and electrical resistance at the interface.
GaInAg的选择还考虑了本研究中使用的模具金属化和AMB衬底的涂层。来自STMicroelectronics的SiC外延层（SCT 116 N120 G3 DXAG，1200 V，130 A）的漏极是Ti/Ni/Ag，其在与GaInAg LM中的镓接触时表现出化学稳定性。而且，这种漏极金属化通常用于功率电子器件。AMB基板镀有银。这确保了与基于银的GaInAg-LM的良好润湿性，允许在AMB和管芯金属化表面上轻松地进行LM印刷，并降低界面处的热阻和电阻。

Due to the strong cohesive force of metallic bonds among atoms, LMs have high surface tension with a surface tension coefficient γ >500 mN/m [18], which is six times higher than water. In the proposed packaging, the total perimeter L of the contact interface between AMB and FPCB wetted by LM is 54.3 mm. The minimum force F = 2γL needed to overcome surface tension and separate two surfaces is calculated as 54.3 mN, indicating that the surface tension of LM can support the total weight of the package (28.6 mN). Furthermore, the extremely high surface tension ensures the printed LM stays between the interface without random flow.
由于原子间金属键的强凝聚力，LM具有高表面张力，表面张力系数γ>500 mN/m [18] ，比水高6倍。在所提出的封装中，LM润湿的AMB和FPCB之间的接触界面的总周长L为54.3 mm。计算出克服表面张力并分离两个表面所需的最小力F = 2γL为54.3 mN，表明LM的表面张力可以支撑封装的总重量（28.6 mN）。此外，极高的表面张力确保印刷的LM停留在界面之间，而没有随机流动。

Fig. 2 illustrates the structure of the proposed GaInAg-LM packaging. The design is to decouple the thermal strain of the AMB substrate from both the FPCB and the SiC device using LM and an embedded floating die structure. The top surface of the AMB is covered by GaInAg-LM to replace the conventional drain-side die-attach layer. The source and gate of the SiC mosfet die are soldered underneath the FPCB. The die chip is embedded inside the cavity of the top copper of the AMB, allowing the die to float on the LM layer. As a result, rigid connections are replaced by a frictional contact between the FPCB and the AMB, and a fluidic connection between the die and the AMB. For comparison, a soldered counterpart where both the die drain side and the FPCB are soldered to the AMB substrate is also considered in this study. Both packaging designs utilize the same FPCB, and their AMB substrates are essentially the same, with the only difference being the depth of the cavity.
图0#示出了所提出的GaInAg-LM封装的结构。该设计使用LM和嵌入式浮动管芯结构将AMB衬底的热应变与FPCB和SiC器件解耦。AMB的上表面由GaInAg-LM覆盖，以取代传统的漏极侧管芯附着层。SiC半导体管芯的源极和栅极焊接在FPCB下方。裸片芯片嵌入AMB的顶部铜的空腔内，允许裸片浮在LM层上。因此，刚性连接被FPCB和AMB之间的摩擦接触以及管芯和AMB之间的流体连接所取代。为了进行比较，在本研究中还考虑了将管芯漏极侧和FPCB焊接到AMB基板的焊接对应物。两种封装设计都使用相同的FPCB，其AMB基板基本相同，唯一的区别是腔体的深度。

Fig. 2.  图二.

Structure of the LM-based PCB/die/AMB hybrid SiC packaging.
基于LM的PCB/管芯/AMB混合SiC封装的结构。

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The FPCB consists of a 0.29-mm-thin layer of polyimide core with two Oz copper layers at both sides. SAC 305 solder is used between the die and the FPCB by connecting the source and gate, giving precise connections to the top side of the die and keeping the die floating around the center of the cavity. Unlike the die attach between the die and the AMB substrate, the solder layer between the FPCB and the die does not experience high thermal stress, owing to the low Young's modulus and low thickness of FPCB. In addition, the thin FPCB structure also enables a small power loop that effectively reduces parasitic inductance and resistance.
FPCB由0.29 mm厚的聚酰亚胺芯层和两侧的两个Oz铜层组成。SAC 305焊料通过连接源极和栅极而用于芯片和FPCB之间，从而提供与芯片顶侧的精确连接，并保持芯片在腔体中心周围浮动。与管芯和AMB基板之间的管芯附接不同，由于FPCB的低杨氏模量和低厚度，FPCB和管芯之间的焊料层不经历高热应力。此外，薄FPCB结构还实现了有效降低寄生电感和电阻的小功率环路。

The AMB has thick Cu layers of 0.8 mm, which can improve the current carrying and heat spreading capability. A cavity of 7 mm × 7 mm in the middle of the top copper layer of the AMB is designed to embed the die inside the AMB copper layer and keep the source–gate surface level with the copper top surface for FPCB connection. The cavity is rotated by 45° relative to the substrate to achieve a uniform current density distribution and keep symmetry at system level for simpler integration. The cavity is created by a chemical etching process using FeCl₃ solution, which is widely adopted to etch the copper on PCB [19]. The cavity depth is controlled by etching time. For the soldered module, the cavity depth is 290 μm, while the thickness of the die is approximately 180 μm. This leaves a gap of approximately 110 μm for the solder to reflow during the vacuum reflow process. For the LM packaging, the cavity depth has been reduced to 210 μm, creating a thinner gap between the bottom of the die and the AMB being filled with the LM. Therefore, the embedded die is fluidically touched to the AMB top copper layer via a fluidic LM layer. A shallower cavity can reduce the amount of LM needed, avoiding random spilling and reducing thermal resistance. Detailed dimensions of the designs can be found in Table II.
磁轴承具有0.8mm厚的铜层，这可以提高载流和散热能力。在AMB铜层中间设计了一个7 mm × 7 mm的空腔，将芯片嵌入AMB铜层中，并使源极-栅极表面与铜顶面保持水平，以便于FPCB连接。腔体相对于衬底旋转45°，以实现均匀的电流密度分布，并保持系统级的对称性，以简化集成。该空腔是通过使用FeCl₃溶液的化学蚀刻工艺产生的，该溶液被广泛用于蚀刻PCB [19] 上的铜。腔深度由蚀刻时间控制。对于焊接模块，腔体深度为290 μm，而管芯的厚度约为180 μm。这为焊料在真空回流过程中回流留下了约110 μm的间隙。 对于LM封装，腔体深度已减小到210 μm，从而在管芯底部和填充LM的AMB之间形成更薄的间隙。因此，嵌入式管芯经由流体LM层流体接触AMB顶部铜层。较浅的腔可以减少所需的LM的量，避免随机溢出并降低热阻。设计的详细尺寸见表1 #。

TABLE II Dimensions of the Proposed Design
表II拟议设计的尺寸

FEA is used to evaluate and compare the thermomechanical behavior of the LM-based packaging and solder-based packaging. For thermal modeling, a loss of 100 W from the die is set as the heat source. The bottom side of the AMB is set to a heat transfer coefficient of 7500 W/(m²K), representing the cooling capability provided by the liquid cooling plate in the experiment. All other boundaries are adiabatic. For mechanical modeling, the Coulomb friction model is utilized for the contact interface between the FPCB and AMB with a friction coefficient of 0.5. For the LM-based packaging, the top side of FPCB is subject to a 20 N downward force, which is insignificant for common mechanical clamping. For the solder-based packaging, no external force is exerted.
有限元分析被用来评估和比较基于LM的封装和基于焊料的封装的热机械行为。对于热建模，将来自模具的100 W的损失设定为热源。AMB的底侧被设定为7500 W/（m2 K）的传热系数，表示实验中由液体冷却板提供的冷却能力。所有其他边界都是绝热的。对于机械建模，库仑摩擦模型用于FPCB和AMB之间的接触界面，摩擦系数为0.5。对于基于LM的封装，FPCB的顶侧受到20 N的向下力，这对于常见的机械夹持是微不足道的。对于基于焊料的封装，不施加任何外力。

As shown in Fig. 3, the thermomechanical stress on the SiC die in the LM packaging is significantly lower than in the soldered packaging. This improves reliability because high stress within the die chip can result in cracks in the device [20]. The stress of the LM packaging is mainly distributed near the source pad where it is soldered to the FPCB. However, the FPCB is thin and the polyimide has a lower Young's modulus. Therefore, the small solder connection for the die to the FPCB does not cause high stress. By contrast, for the solder-based packaging, both the top and bottom sides of the die are soldered to the FPCB and AMB, respectively. The rigid connection to the thick copper of the AMB substrate results in significant stress. Therefore, the average von Mises stress of the die in the solder packaging is 2.25 times higher than that of the LM-based design.
如图 3 所示，LM封装中SiC管芯上的热机械应力显著低于焊接封装。这提高了可靠性，因为管芯芯片内的高应力可能导致器件 [20] 中的裂纹。LM封装的应力主要分布在源极焊盘附近，在该源极焊盘处，LM封装焊接到FPCB。然而，FPCB很薄并且聚酰亚胺具有较低的杨氏模量。因此，管芯到FPCB的小焊料连接不会引起高应力。相比之下，对于基于焊料的封装，管芯的顶侧和底侧分别焊接到FPCB和AMB。与AMB基板的厚铜的刚性连接导致显著的应力。因此，焊料封装中的管芯的平均冯米塞斯应力比基于LM的设计高2.25倍。

Fig. 3.  图三.

Thermomechanical stress comparison of the die and the AMB. (a) Solder-based packaging. (b) LM-based packaging.
模具和电磁轴承的热机械应力比较。(a)基于焊料的包装。(b)基于LM的包装

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As it is shown in Fig. 4, because the die has a lower CTE than AMB, it has a lower thermal strain. For the LM-based packaging, the difference in thermal strain between the AMB and die is not problematic because it is decoupled by the LM and the floating die structure. Therefore, compared with the solder-based package, the LM package's die has a lower strain and its AMB has a higher strain. For the solder-based packaging, the rigid connection makes the SiC die under tension and the AMB is under compression, causing significant shear stress among die, solder, and AMB. The shear stress of the AMB is illustrated in Fig. 5. For the solder-based packaging, the average shear stress inside the cavity reaches 16.6 MPa. However, for the LM packaging, the average shear stress inside the cavity is only 106 kPa, which is a 99.4% reduction. This near elimination of sheer stress is due to the decoupling of strain of the die chip and AMB by interfacing with fluidic LM. It is noteworthy that the shear stress outside the cavity is also reduced. In Fig. 5(a), high shear stress between the FPCB and the AMB is due to the rigid connection via solder. This stress is nearly eliminated by joining the FPCB and AMB via fluidic LM, as shown in Fig. 5(b).
如图 4 所示，由于管芯具有比AMB低的CTE，因此其具有较低的热应变。对于基于LM的封装，AMB和管芯之间的热应变的差异不是问题，因为它被LM和浮动管芯结构去耦。因此，与基于焊料的封装相比，LM封装的管芯具有较低的应变，而其AMB具有较高的应变。对于基于焊料的封装，刚性连接使SiC管芯处于拉伸状态，而AMB处于压缩状态，从而在管芯、焊料和AMB之间产生显著的剪切应力。AMB的剪应力如图 5 所示。对于基于焊料的封装，空腔内的平均剪切应力达到16.6MPa。然而，对于LM封装，腔内的平均剪切应力仅为106 kPa，降低了99.4%。剪切应力的这种几乎消除是由于通过与流体LM连接而使管芯芯片和AMB的应变去耦。 值得注意的是，空腔外部的剪切应力也减小了。在图2#中，FPCB和AMB之间的高剪切应力是由于通过焊料的刚性连接。通过流体LM连接FPCB和AMB几乎消除了这种应力，如图 5(b) 所示。

Fig. 4.  见图4。

Comparison of volumetric thermal strain of the die and AMB. (a) Solder-based packaging. (b) LM-based packaging.
模具和电磁轴承的体积热应变比较。(a)基于焊料的封装。(b)基于LM的包装

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Fig. 5.  图五.

Comparison of shear stress on the top copper of AMB substrate. (a) Solder-based packaging. (b) LM-based packaging.
磁悬浮轴承基板顶部铜层上的剪切应力比较。(a)基于焊料的包装。(b)基于LM的包装

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The shear stress at the bottom copper layer of the FPCB is also compared in Fig. 6. The average surface shear stress of the solder packaging reached 3.95 MPa, whereas that of the LM packaging is only 0.74 MPa. This is because the rigid connection of the solder-based packaging is changed into a fluidic connection in the LM-based packaging, and the force on the surface of the copper becomes frictional, resulting in significantly lower shear stress from the mismatched CTE. A lower shear force on the Cu layer can reduce the possibility of delamination of the FPCB for improved reliability.
FPCB底部铜层处的剪切应力也在图 6 中进行了比较。焊料封装的平均表面剪切应力达到3.95 MPa，而LM封装的平均表面剪切应力仅为0.74 MPa。这是因为基于焊料的封装的刚性连接在基于LM的封装中变为流体连接，并且铜表面上的力变为摩擦力，从而导致来自失配CTE的显著更低的剪切应力。Cu层上的较低剪切力可以降低FPCB分层的可能性，以提高可靠性。

Fig. 6.  见图6。

Comparison of shear stress of the bottom Cu layer of the FPCB. (a) Solder-based packaging. (b) LM-based packaging.
FPCB底部Cu层的剪切应力比较。(a)基于焊料的封装。(b)基于LM的包装

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Samples of LM-based packaging are made using the process, as shown in Fig. 7. After applying solder paste using stencil, the source and gate of the die are soldered to the FPCB. Then, the epoxy or silicone gel is applied to form an insulation ring around four sides of the die. This can form a dam to stop the LM from leaking to the source and gate and provide sufficient protection from voltage breakdown. The AMB is etched, plated with silver, and then covered with GaInAg-LM. Finally, the FPCB with die is touched to the AMB via GaInAg-LM. The high surface tension of GaInAg-LM adheres the FPCB and AMB. For comparison, solder-based packaging using the same die and FPCB is also fabricated.
LM基包装的样品使用该工艺制成，如图 7 所示。在使用模板施加焊膏之后，将管芯的源极和栅极焊接到FPCB。然后，施加环氧树脂或硅凝胶以在管芯的四个侧面周围形成绝缘环。这可以形成坝以阻止LM泄漏到源极和栅极，并提供足够的保护以防止电压击穿。AMB被蚀刻，用银电镀，然后用GaInAg-LM覆盖。最后，通过GaInAg-LM将带有裸片的FPCB与AMB接触。GaInAg-LM的高表面张力将FPCB和AMB粘合在一起。为了比较，也制造了使用相同的管芯和FPCB的基于焊料的封装。

Fig. 7.  见图7。

Fabrication process of the GaInAg-LM FPCB/AMB hybrid packaging.
GaInAg-LM FPCB/AMB混合封装的制造工艺。

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As shown in the upper half of Fig. 8, the top metallization of the AMB substrate is entirely wetted by the GaInAg-LM. The surface tension well holds the LM on the Ag-plated Cu surface and constrains LM from randomly flowing and dripping. A fixture is designed to accommodate the device under test (DUT), Cu busbar, and cooling plate. A downward clamping force is applied to DUT by the fixture through Cu busbar.
如图 8 的上半部分所示，AMB衬底的顶部金属化完全被GaInAg-LM润湿。表面张力很好地将LM保持在镀银Cu表面上，并抑制LM随机流动和滴落。夹具设计用于容纳被测器件（DUT）、铜母线和冷却板。夹具通过铜母线对DUT施加向下的夹紧力。

Fig. 8.  见图8。

Prototype of LM-based packaging and experimental setup.
基于LM的封装和实验装置的原型。

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The experimental setup for the comparison of thermal resistance under different power dissipation is shown in the lower half of Fig. 8. To ensure a fair comparison, we used the same cooling conditions for both packaging types, including an identical cooling plate with the same coolant temperature (11.6 °C) and flow rate (16 L/min). We also applied thermal interface material for better thermal conductivity and used a torque screwdriver to uniformly tighten the fixture screws, reducing variability in thermal contact resistance. Additionally, we set the thermal camera to capture the highest temperature on the source soldering pad, ensuring that any potential error would be systematically applied to both sets of measurements. This consistency in testing conditions is crucial for a valid comparison, as it minimizes external influences and reveals the inherent thermal performance differences between the two packaging approaches. It is shown in Fig. 9 that the thermal resistance of the LM packaging slightly increases with its power dissipation, from 0.92 to 1.04 K/W. This is because, under high power losses, the high temperature increases the scattering of free electrons inside LM, reducing its thermal conductivity. However, the average thermal resistance for the LM packaging is only 5% larger than that of the soldered counterpart.
图 8 的下半部分显示了用于比较不同功耗下热阻的实验装置。为了确保公平比较，我们对两种包装类型使用了相同的冷却条件，包括具有相同冷却剂温度（11.6 °C）和流速（16 L/min）的相同冷却板。我们还应用了热界面材料以提高导热性，并使用扭矩螺丝刀均匀地拧紧夹具螺钉，减少了接触热阻的变化。此外，我们还将热成像摄像机设置为捕捉源焊盘上的最高温度，确保任何潜在的误差都能系统地应用于两组测量。这种测试条件的一致性对于有效的比较至关重要，因为它最大限度地减少了外部影响，并揭示了两种封装方法之间固有的热性能差异。如图所示。 9 LM封装的热阻随着其功耗从0.92 K/W略微增加到1.04 K/W。这是因为，在高功率损耗下，高温增加了LM内部自由电子的散射，降低了其热导率。然而，LM封装的平均热阻仅比焊接对应物大5%。

Fig. 9.  见图9。

Junction to coolant thermal resistance comparison.
结与冷却剂热阻比较。

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By replacing the cold plate with a load cell, the downward force (clamping force) applied to the DUT can be measured. The electric characteristics of the LM packaging have been tested under different clamping forces. The result from the B1505A curve tracer is demonstrated in Fig. 10. When the force applied to the FPCB exceeds 4.3 N, its influence on on-state resistance is negligible. This means that the LM-based packaging design requires very low clamping force to achieve good electric contact among FPCB, die, and AMB. In real applications, this pressure is lower than the pressure required for a power module to be attached to a heatsink. The R_dson for the solder packaging and LM packaging is 15.53 mΩ and 15.98 mΩ, respectively, which are very close.
通过用测力传感器代替冷板，可以测量施加到DUT的向下力（夹紧力）。LM封装的电气特性已在不同夹持力下进行了测试。B1505A曲线跟踪器的结果如图 10 所示。当施加到FPCB的力超过4.3N时，其对导通电阻的影响可以忽略。这意味着基于LM的封装设计需要非常低的夹紧力来实现FPCB、管芯和AMB之间的良好电接触。在真实的应用中，该压力低于将功率模块附接到电池所需的压力。焊料封装和LM封装的R_dson分别为15.53 mΩ和15.98 mΩ，非常接近。

Fig. 10.  见图10。

Output characteristics comparison between solder packaging and LM packaging under different pressures (V_gs = 18 V).
焊料封装和LM封装在不同压力下的输出特性比较（_Vgs= 18 V）。

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To validate the voltage-blocking capability of the proposed LM packaging, the leakage current is measured, as shown in Fig. 11. The LM-based packages with epoxy or silicone gel insulation ring are tested and compared with the soldered design. The measurement stops when the voltage exceeds 1.5 kV, or the leakage current exceeds 1 μA. Both LM-based designs have a leakage less than 1 μA at 1.5 kV, which is beyond the rated voltage of the SiC mosfet. This proves that the GaInAg-LM packaging does not affect the voltage-blocking capability of the device.
为了验证所提出的LM封装的电压阻断能力，测量漏电流，如图 11 所示。分别对环氧树脂和硅胶绝缘环的LM基封装进行了测试，并与钎焊设计进行了比较。当电压超过1.5 kV或漏电流超过1 μA时，测量停止。两种基于LM的设计在1.5 kV时的泄漏小于1 μA，这超出了SiCMOSFET的额定电压。这证明GaInAg-LM封装不影响器件的电压阻断能力。

Fig. 11.  见图11。

Leakage current measurement result for LM packaging (V_gs = 0 V).
LM封装的漏电流测量结果（V_gs= 0 V）。

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For the soldered design, the implementation of epoxy or silicone gel to the assembly needs to be after the soldering process by injecting because the soldering temperature is too high for epoxy or silicone gel to withstand. The injecting process is prone to void, which could be the cause of an earlier breakdown at 1220 V of the soldered design, as shown in Fig. 11. By contrast, the fluidic approach using LM at the room temperature to join parts, thus, the insulation epoxy or silicone gel, can be applied to the die sides and protect the die before applying the LM. The fabrication process becomes simpler and more reliable.
对于焊接设计，需要在焊接工艺之后通过注射将环氧树脂或硅凝胶施加到组件，因为焊接温度对于环氧树脂或硅凝胶来说太高而无法承受。注入过程容易产生空隙，这可能是焊接设计在1220 V时较早击穿的原因，如图 11 所示。相比之下，在室温下使用LM来接合部件的流体方法（因此，绝缘环氧树脂或硅凝胶）可以施加到管芯侧并且在施加LM之前保护管芯。制造过程变得更简单和更可靠。

Leakage current measurements were extended to higher junction temperatures, revealing an expected increase in leakage current with temperature, a characteristic inherent to semiconductor devices. As shown in Fig. 12, both the epoxy and silicone gel can withstand the high voltage and high junction temperature without signs of breakdown. In this test, silicone gel exhibits better insulation capability, especially at high-temperature ranges.
漏电流测量扩展到更高的结温，揭示了预期的增加，漏电流随温度，半导体器件固有的特性。如图 12 所示，环氧树脂和硅凝胶都可以承受高电压和高结温，而不会出现击穿迹象。在该测试中，硅凝胶表现出更好的绝缘能力，特别是在高温范围内。

Fig. 12.  见图12。

Leakage current of LM package at higher junction temperatures.
LM封装在较高结温下的漏电流。

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A preliminary reliability assessment on the LM packaging is carried out through accelerated thermal cycling tests using a harsh temperature profile. The environment temperature T_a cycles are between 52 and 217 °C with ΔT_a = 165 °C and 4 min per cycle. The measured temperature at the top of the package varies between 52 and 180 °C with ΔT = 128 °C. The leakage current after temperature cycling is shown in Fig. 13. The LM package with silicone gel insulation ring had no degradation of insulation after 1300 cycles.
LM封装的初步可靠性评估是通过使用苛刻的温度曲线进行加速热循环测试。环境温度_Ta循环在52和217 °C之间，Δ_Ta = 165 °C，每个循环4分钟。封装顶部的实测温度在52 ° C和180 °C之间变化，ΔT = 128 °C。温度循环后的漏电流如图 13 所示。具有硅凝胶绝缘环的LM包装在1300次循环后没有绝缘退化。

Fig. 13.  图十三.

Leakage current of comparison after thermal cycling.
热循环后比较的漏电流。

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The microscopic image of the silicone gel insulation ring after 2600 thermal cycles in Fig. 14 also showed no damage caused by repeated temperature cycles. However, this sample had a gate failure due to high temperature. This LM sample would have been able to pass the insulation test after 2600 cycles if the gate of the mosfet had not been damaged. The soldered module experienced 2600 cycles failed due to solder crack. Therefore, the leakage of the soldered package that experienced 1300 cycles is demonstrated, which breaks down at 1230 V. The module with epoxy insulation has a breakdown voltage of 1250 V after 2600 cycles, which is higher than the soldered module that experienced fewer temperature cycles.

Fig. 14.

Microscopic image of silicone gel insulation ring with no signs of damage after 2600 thermal cycles.

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This letter presents a power electronics packaging solution based on the floating die structure and LM fluidic connection for ultralow thermomechanical stress. Instead of using rigid connections, such as solder joints and nano-silver sintering with excessive thermal stress, the GaInAg-LM layer is adopted to decouple the thermal strain while maintaining thermal and electrical connections. The FEM simulation has demonstrated a 56% reduction in the von Mises stress of the die and a 99% reduction in shear stress. Prototypes of both the LM-based packaging and solder-based packaging of a hybrid FPCB and AMB structure example are fabricated and compared in the experiment. The GaInAg-LM can provide similar electrical and thermal conduction to the solder. High-temperature leakage measurement and thermal cycling aging test validate the uncompromised voltage-blocking capability of the LM-based packaging. This letter demonstrates the feasibility of using LM material for a fluidic structure of power device packages. This new packaging technology has uncompromised thermal and electrical conduction. The fabrication of such packaging can be completed at the room temperature without large pressure, which increases the reliability of the die chip. The fluidic structure and room temperature fabrication process enabled by LM can also inspire more high-performance and low-thermal-stress packaging designs.