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Features 特点

  • Fully integrated electrophysiology interface chip with 16 channels of low-noise amplifiers and constantcurrent stimulators controlled by industry-standard serial peripheral interface (SPI)
    具有 16 个低噪声放大器和恒定电流刺激器的完全集成电生理接口芯片，由行业标准串行外围接口（SPI）控制
  • Stimulators source and sink currents ranging from 10 nA to 2.55 mA over a 14 V range with integrated compliance monitors
    刺激器在整合的合规监测器范围内，源和汇电流范围从 10 nA 到 2.55 mA，范围为 14 V。
  • Integrated charge-recovery circuits and fault current detection
    集成充电恢复电路和故障电流检测
  • Low input-referred noise: typical
    低输入参考噪声: 典型
  • ADC operation to 714 kSamples per second; supports sampling 16 amplifier channels at each
    ADC 操作每秒 714 kSamples；支持每个 采样 16 个放大器通道
  • Standard four-wire 32-bit SPI interface with CMOS or low-voltage differential signaling (LVDS) I/O pins
    标准的四线 32 位 SPI 接口，带有 CMOS 或低压差分信号（LVDS）I/O 引脚
  • Upper cutoff frequency of all amplifiers set by on-chip registers; adjustable from 100 Hz to 20 kHz
    所有放大器的上限截止频率由芯片上的寄存器设置；可调节范围从 100 赫兹到 20 千赫兹
  • Lower cutoff frequency of all amplifiers set by on-chip registers; adjustable from 0.1 Hz to 1 kHz
    所有放大器的下截止频率由芯片上的寄存器设置；可调节范围从 0.1 赫兹到 1 千赫兹
  • Fast amplifier artifact recovery for post-stimulus recording
    后刺激记录的快速放大器工件恢复
  • Integrated multi-frequency in situ electrode impedance measurement capability
    集成多频在位电极阻抗测量能力
  • Individual amplifier and stimulator power up/down for power minimization
    个别放大器和刺激器的上电/下电以实现功耗最小化

Applications 应用程序

  • Miniaturized multi-channel headstages for neural recording and stimulation
    小型化的多通道头戴式电极用于神经记录和刺激
  • Low-power wireless headstages or backpacks for electrophysiology experiments
    用于电生理实验的低功耗无线头戴式设备或背包
  • Multielectrode array (MEA) in vitro recording and stimulation systems
    多电极阵列（MEA）体外记录和刺激系统

Digital Electrophysiology Stimulator/Amplifier Chip
数字电生理刺激器/放大器芯片

20 January 2016; updated 13 May 2021
2016 年 1 月 20 日；更新于 2021 年 5 月 13 日
See page 15 for important addendum from May 2021
请查看 2021 年 5 月的重要附录，见第 15 页

Description 描述

The Intan Technologies RHS2116 microchip is a complete bidirectional electrophysiology interface system. This device contains an array of 16 stimulation/amplifier blocks. Each channel includes a low-noise amplifier with programmable bandwidth and a constant-current stimulator with programmable amplitude.
Intan Technologies RHS2116 微芯片是一种完整的双向电生理接口系统。该设备包含一个由 16 个刺激/放大器块组成的阵列。每个通道包括一个带可编程带宽的低噪声放大器和一个带可编程幅度的恒定电流刺激器。
The RHS2116 is suitable for a wide variety of biopotential interfacing applications. Innovative circuit architecture combines stimulators, amplifiers, analog and digital filters, a multiplexed 16 -bit analog-to-digital converter (ADC), and a flexible electrode impedance measurement module on a single silicon chip. In practice, an array of electrodes are connected directly to one side of the chip, and a digital bus on the other side is used to control stimulation and read digitized electrode signals.
RHS2116 适用于各种生物电接口应用。创新的电路架构将刺激器、放大器、模拟和数字滤波器、多路复用的 16 位模数转换器（ADC）以及灵活的电极阻抗测量模块集成在单个硅片上。在实践中，一组电极直接连接到芯片的一侧，另一侧的数字总线用于控制刺激和读取数字化的电极信号。
The bandwidths of the amplifiers may be dynamically programmed by means of internal registers on each chip. This flexibility allows the chips to be optimized for different types of signals. Integrated charge-recovery circuits and fast amplifier settling can be employed following stimulation pulses to minimize residual artifacts.
放大器的带宽可以通过每个芯片上的内部寄存器动态编程。这种灵活性使得芯片可以针对不同类型的信号进行优化。在刺激脉冲后可以使用集成的电荷恢复电路和快速放大器定位来最小化残留伪影。
A low-distortion, high-speed analog multiplexer (MUX) allows all the amplifiers to share one on-chip ADC. The ADC can sample each channel up to . Additional on-chip circuitry enables in situ electrode impedance measurements at user-programmable frequencies. By interfacing electrodes directly with a digital command and data stream, the RHS2116 replaces all analog instrumentation circuitry in electrophysiology monitoring and stimulation systems.
一种低失真、高速模拟多路复用器（MUX）允许所有放大器共享一个芯片上的 ADC。ADC 可以对每个通道进行采样，最多达到 。额外的芯片电路使得用户可以在现场以可编程频率进行电极阻抗测量。通过直接将电极与数字命令和数据流接口，RHS2116 替代了电生理监测和刺激系统中的所有模拟仪器电路。
RHS2116 chips are packaged in standard QFN surface mount packages, or available in bare die form. The small footprint and low power consumption of the multichannel chips enable the miniaturization of front end electronics for miniature headstages and other portable biopotential interface systems.
RHS2116 芯片采用标准 QFN 表面贴装封装，或以裸片形式提供。多通道芯片的小尺寸和低功耗使得前端电子设备可以被微型化，用于微型头戴式和其他便携生物电接口系统。

RHS2116 Digital Electrophysiology Stimulator/Amplifier Chip
RHS2116 数字电生理刺激器/放大器芯片

Simplified Chip Diagrams 简化芯片图解

RHS2000-SERIES FAMILY RHS2000 系列家族

There is currently one device in the RHS2000-series electrophysiology interface family: the RHS2116, which is described in this datasheet. The following table lists the features of this chip:
目前 RHS2000 系列电生理接口家族中有一种设备：RHS2116，该设备在本数据表中有详细描述。以下表格列出了该芯片的特点：
DEVICE

放大器/刺激器 每个芯片的通道数
AMPLIFIER/STIMULATOR
CHANNELS PER CHIP
AMPLIFIER INPUT PINS 放大器输入引脚 PACKAGE SIZE 包装尺寸 BARE DIE SIZE 裸芯尺寸
RHS2116 16

16 单极放大器输入; 1 个常见的参考输入
16 unipolar amplifier inputs;
1 common reference input
pin QFN  引脚 QFN

Package Description 包描述

RHS2116 Simplified Diagram
RHS2116 简化图解

The RHS2116 contains an array of 16 stimulator/amplifier blocks controlled through a digital SPI interface. Each stimulator/amplifier channel includes two amplifiers for sensing electrode voltages: (1) an AC-coupled high-gain amplifier for observing small electrophysiological signals (e.g., extracellular action potentials, local field potentials) in the range of a few microvolts to a few millivolts; and (2) a DC-coupled low-gain amplifier for monitoring electrode potential in response to stimulation, in the range of tens of millivolts to several volts. The high-gain amplifiers are referenced to a common, shared pin (ref_elec) that can be connected to a low-impedance reference electrode to reduce common-mode interference (e.g., line noise). The low-gain amplifiers are referenced to ground. In many applications, the reference electrode will also be used as the stimulation counter (return) electrode and will be tied to ground.
RHS2116 包含一个由 16 个刺激器/放大器模块组成的阵列，通过数字 SPI 接口进行控制。每个刺激器/放大器通道包括两个放大器，用于感测电极电压：(1)用于观察微电压至几毫伏范围内的小电生理信号（例如细胞外动作电位、局部场电位）的交流耦合高增益放大器；以及(2)用于监测电极电位响应刺激的直流耦合低增益放大器，范围为几十毫伏至几伏。高增益放大器参考一个共用引脚（ref_elec），可以连接到低阻抗参考电极以减少共模干扰（例如 线噪声）。低增益放大器参考地。在许多应用中，参考电极也将用作刺激计数（返回）电极，并将接地。
Each channel has an independent stimulator module that can generate biphasic constant-current pulses with amplitudes varying from 10 nanoamps to 2.55 milliamps. These stimulators are capable of maintaining constant current output over a wide range of electrode voltages, with compliance limits near the stimulation voltage supplies VSTIM+ and VSTIM-. Stimulator modules automatically detect electrode voltages exceeding compliance limits and set corresponding register bits.
每个通道都有一个独立的刺激器模块，可以产生幅度从 10 纳安到 2.55 毫安变化的双相恒流脉冲。这些刺激器能够在广泛的电极电压范围内保持恒定的电流输出，其合规限制接近刺激电压供应 VSTIM+和 VSTIM-。刺激器模块会自动检测超过合规限制的电极电压，并设置相应的寄存器位。
Most stimulation protocols use charge-balanced pulses to avoid oxidation-reduction reactions at the electrode-tissue interface. Variations in transistor characteristics across a chip make it impossible to achieve perfect charge balance, so recovery circuits are included to bleed off residual charge after stimulation pulses. A charge recovery switch can be used to briefly connect an electrode to a common stim_GND pin, which is typically tied to ground. Other charge recovery circuits in each channel pull the electrodes toward a user-specified potential with small, programmable currents. A global fault current detector is also included on the chip; this circuit can be inserted into a common return current path and used to detect any unintended current.
大多数刺激协议使用平衡电荷的脉冲，以避免电极-组织界面的氧化还原反应。芯片上晶体管特性的变化使得完美的电荷平衡不可能实现，因此在刺激脉冲后包括恢复电路以释放残余电荷。充电恢复开关可用于短暂连接电极到一个通用的刺激_GND 引脚，通常与地线相连。每个通道中的其他充电恢复电路通过小型可编程电流将电极拉向用户指定的电位。芯片上还包括全局故障电流检测器；该电路可以插入到一个通用回流电流路径中，并用于检测任何意外电流。
PIN TYPE FUNCTION
VDD, GND VDD，GND power 力量

3.3 V 电源（ ). 所有 VDD 引脚必须连接到同一个 潜在。所有 GND 引脚必须连接到相同的地面电位。
3.3 V power supply ( ). All VDD pins must be connected to the same
potential. All GND pins must be connected to the same ground potential.
VSTIM+, VSTIM- VSTIM+，VSTIM- power 力量

刺激电源。总刺激电源（VSTIM+ - VSTIM-） 可能不超过 14 V。VSTIM+受限于+3.3 V 至+10.7 V 范围内 到地面。 VSTIM- 限制在相对于地面的范围内为-3.3 V 至-10.7 V。 在芯片运行期间必须向这些引脚施加电源，否则 过大的电流将通过 VDD 绘制。不要让它们保持未连接状态。
Stimulation power supplies. The total stimulation power supply (VSTIM+ - VSTIM-)
may not exceed 14 V . VSTIM+ is limited to the range of +3.3 V to +10.7 V with respect
to ground. VSTIM- is limited to the range of -3.3 V to -10.7 V with respect to ground.
Power must be applied to these pins during operation of the chip, otherwise
excessive current will be drawn through VDD. Do not leave these unconnected.
elec0, elec1, analog I/O 模拟输入/输出 Electrode I/O pins. Unipolar amplifier inputs and stimulator outputs.
电极 I/O 引脚。单极放大器输入和刺激器输出。
ref_elec analog input 模拟输入 Amplifier array common reference (negative) input.
放大器阵列共同参考（负）输入。
stim_GND analog I/O 模拟输入/输出 Common pin for stimulator charge recovery. Typically tied to GND.
刺激器充电恢复的常见引脚。通常连接到 GND。
sense_GND 感知_GND analog I/O 模拟输入/输出 Optional pin used for return current sensing and stimulation fault detection.
用于返回电流感应和刺激故障检测的可选引脚。
LVDS_en digital input 数字输入

当 LVDS_en 被拉高时，与 SPI 数据总线进行通信 使用低压差分信号传输（LVDS）。当 LVDS_en 被拉低时，SPI 通信使用传统的 CMOS 级信号。
When LVDS_en is pulled high, communication with the SPI data bus is conducted
using low-voltage differential signaling (LVDS). When LVDS_en is pulled low, SPI
communication uses traditional CMOS-level signaling.

数字 LVDS 输入对
digital LVDS
input pair
SCLK+, SCLK- SCLK+，SCLK-

数字 LVDS 输入对
digital LVDS
input pair

用于 SPI 数据总线的串行时钟输入。 时钟的基本值为零（CPOL = 0）。 如果 LVDS_en 被拉低，只有 SCLK+被用作标准 CMOS 电平输入。如果 LVDS_en 被拉高，两个引脚都用作 LVDS 输入对。
Serial clock input for SPI data bus. The base value of the clock is zero (CPOL = 0). If
LVDS_en is pulled low, only SCLK+ is used as a standard CMOS-level input. If
LVDS_en is pulled high, both pins are used as an LVDS input pair.
MOSI+, MOSI-

数字 LVDS 输入对
digital LVDS
input pair

串行数据输入（SPI 数据总线的“主输出，从输入”）。 RHS2116 芯片始终 在 SPI 数据链路中充当从设备。此行在 SCLK 的上升沿上采样。如果 LVDS_en 被拉低，只有 MOSI+被用作标准 CMOS 电平输入。如果 LVDS_en 被拉高，两个引脚都用作 LVDS 输入对。
Serial data input ("Master Out, Slave In") for SPI data bus. The RHS2116 chip always
acts as slave in an SPI data link. This line is sampled on the rising edge of SCLK. If
LVDS_en is pulled low, only MOSI+ is used as a standard CMOS-level input. If
LVDS_en is pulled high, both pins are used as an LVDS input pair.
MISO+, MISO-

数字 LVDS 输出对
digital LVDS
output pair

串行数据输出（"主输入，从输出"）用于 SPI 数据总线。RHS2116 芯片 总是在 SPI 数据链路中充当从设备。该线路的值会根据响应而改变 在 SCLK 上的下降沿。如果 LVDS_en 被拉低，只有 MISO+被用作标准 CMOS 级输出。如果 LVDS_en 被拉高，两个引脚都将用作 LVDS 输出 对。
Serial data output ("Master In, Slave Out") for SPI data bus. The RHS2116 chip
always acts as slave in an SPI data link. The value of this line changes in response to
a falling edge on SCLK. If LVDS_en is pulled low, only MISO+ is used as a standard
CMOS-level output. If LVDS_en is pulled high, both pins are used as an LVDS output
pair.
auxout1, auxout2 辅助输出 1，辅助输出 2 digital outputs 数字输出

这些引脚是辅助的 CMOS 数字输出，通过设置来控制或三态化 芯片上的寄存器。如果不使用，这些引脚应保持未连接状态。这些引脚 不应该与地面或 VDD 连接，因为它们在上电时的操作是未定义的。
These pins are auxiliary CMOS digital outputs that are controlled or tristated by setting
registers on the chip. If not used, these pins should be left unconnected. These pins
should never be tied to ground or VDD, as their operation is undefined at power-up.
auxoutOD

开漏高- 电压数字 输出
open-drain high-
voltage digital
output

此引脚是一个辅助开漏数字输出，通过设置寄存器来控制 在芯片上。当引脚被激活时，它会将电流拉到 VSTIM-。这个引脚可以 容忍电压范围从 VSTIM-到 VSTIM+。
This pin is an auxiliary open-drain digital output that is controlled by setting a register
on the chip. When the pin is activated, it pulls current to VSTIM-. This pin can
tolerate voltage levels ranging from VSTIM- to VSTIM+.
stim_en digital input 数字输入

如果将此引脚拉低（接地），则禁用所有芯片上的刺激器。要启用 刺激，stim_en 应该被拉高（至 VDD）。
If this pin is pulled low (to ground), all on-chip stimulators are disabled. To enable
stimulation, stim_en should be pulled high (to VDD).
ADC_ref analog output 模拟输出

必须连接一个外部 10 nF 陶瓷电容到地， 放置在芯片附近以稳定芯片电压参考 ADC 使用的发生器。此引脚上将出现约 1.225 V 的电压 在操作期间。有关更多信息，请参阅“模拟到数字转换器”部分。
An external 10 nF ceramic capacitor to ground must be connected to this pin, and
placed in close proximity to the chip to stabilize the on-chip voltage reference
generator used by the ADC. A voltage of approximately 1.225 V will appear on this pin
during operation. See the "Analog-to-Digital Converter" section for more information.

RHS2116 Digital Electrophysiology Stimulator/Amplifier Chip
RHS2116 数字电生理刺激器/放大器芯片

Electrical Characteristics
电气特性

unless otherwise noted.
除非另有说明。
SYMBOL PARAMETER CONDITIONS VALUE UNITS COMMENTS
VDD Supply Voltage 供电电压 V

推荐名义供应 电压为 3.3 V。
Recommended nominal supply
voltage is 3.3 V .
VSTIM+

正面刺激供应 电压
Positive Stimulator Supply
Voltage

总刺激器供应 (VSTIM+ - VSTIM-) 不能超过 14 V。
Total stimulator supply
(VSTIM+ - VSTIM-)
cannot exceed 14 V.
+3.3
+10.7
V
V

最低 最大
Minimum
Maximum
VSTIM-

负刺激器供应 电压
Negative Stimulator Supply
Voltage

总刺激器供应 (VSTIM+ - VSTIM-) 不能超过 14 V。
Total stimulator supply
(VSTIM+ - VSTIM-)
cannot exceed 14 V .
-3.3
V
V

最大 最低
Maximum
Minimum

CMOS 数字输入 阻抗
CMOS Digital Input
Impedance
LVDS_en = 0 5 pF
LVDS Digital Input Impedance
LVDS 数字输入阻抗		 LVDS_en = 1 150

LVDS 输入被弱拉 如果未连接，请连接到 VDD。用户 必须添加 终止。
LVDS inputs are weakly pulled
to VDD if unconnected. User
must add termination.
VinLO

CMOS 数字“低”输入 电压
CMOS Digital "Low" Input
Voltage

对于所有非 LVDS 芯片的数字输入
For all non-LVDS
digital inputs to chip
+0.7
V

名义“低”输入电压为 地线（0 V .
Nominal "low" input voltage is
GND ( 0 V .
VinH

CMOS 数字“高”输入 电压
CMOS Digital "High" Input
Voltage

对于所有非 LVDS 芯片的数字输入
For all non-LVDS
digital inputs to chip
V

5 V 信号永远不应该 直接应用于芯片。
5 V signals should never be
applied directly to the chips.

LVDS 输入共模 电压
LVDS Input Common-Mode
Voltage
V

建议的共模 电平为 1.25 V。
Suggested common-mode
level is 1.25 V .
VinLVDS-D

LVDS 输入差分 电压
LVDS Input Differential
Voltage
mV

建议的差分电压 是 .
Suggested differential voltage
is .
VoutLVDS-CM

LVDS 输出共模 电压
LVDS Output Common-Mode
Voltage
1.25 V Typical 典型

LVDS 输出差分 电压
LVDS Output Differential
Voltage

与 终止
With
termination
mV Typical 典型

AC 高增益放大器 差分增益
AC High-Gain Amplifier
Differential Gain

在中频区域 之间 和
In midband region
between and
192
45.7
V/V

这种增益产生了一个 ADC 步骤 大小（V/SB） , 指的是电极。
This gain yields an ADC step
size (V/SB) of ,
referred to the electrode.

AC 高增益放大器 DC 差分增益
AC High-Gain Amplifier DC
Differential Gain
0 V/V

完全的 DC 抑制，不同于 具有的放大器 .
Complete DC rejection, unlike
amplifiers that have .
DC Low-Gain Amplifier Gain
DC 低增益放大器增益
-0.125
-18.1

注意： 放大器增益是 负面。
Note: amplifier gain is
negative.
Vocamp

DC 低增益放大器输入 电压范围
DC Low-Gain Amplifier Input
Voltage Range
VSTIM+
VSTIM-
+6.4
V

超出此范围的值 受非线性/剪切影响。
Values beyond this range are
subject to nonlinearity/clipping.
VLSB

ADC 的电压步进大小 （最低有效位）
Voltage Step Size of ADC
(Least Significant Bit)

指的是交流高压- 增益放大器输入 （16 位分辨率） 指的是 DC 低- 增益放大器输入 （10 位分辨率）
referred to AC high-
gain amplifier input
(16 bit resolution)
referred to DC low-
gain amplifier input
(10 bit resolution)
0.195
19.23
mV
fL

AC 高增益放大器低- 频率 3-dB 截止 频率（高通滤波器）
AC High-Gain Amplifier Low-
Frequency 3-dB Cutoff
Frequency (High-Pass Filter)
1000
Hz 赫兹

1 极滚降在 fL 以下。 带宽选择寄存器 有一系列的 .
1-pole roll-off below fL.
Bandwidth selection registers
have range of .

RHS2116 Digital Electrophysiology Stimulator/Amplifier Chip
RHS2116 数字电生理刺激器/放大器芯片

Electrical Characteristics
电气特性

unless otherwise noted.
除非另有说明。
SYMBOL PARAMETER CONDITIONS VALUE UNITS COMMENTS

AC 高增益放大器高- 频率 3-dB 截止 频率（低通滤波器）
AC High-Gain Amplifier High-
Frequency 3-dB Cutoff
Frequency (Low-Pass Filter)
20000
Hz 赫兹

3 极 3 阶 巴特沃斯 滤波器截止频率高于 . 带宽选择寄存器 具有 100 Hz - 20 kHz 的范围。
3-pole 3rd-order Butterworth
filter roll-off above .
Bandwidth selection registers
have range of 100 Hz - 20 kHz .
VACamp-AC

AC 高增益放大器 AC 输入电压范围
AC High-Gain Amplifier AC
Input Voltage Range
mV

超出此范围的值 受非线性/剪切影响。
Values beyond this range are
subject to nonlinearity/clipping.

AC 高增益放大器输入 电压允许的直流偏移
AC High-Gain Amplifier Input
Voltage Allowable DC Offset
Limited by ESD diodes 受 ESD 二极管限制
VSTIM-
VSTIM+ +
V
V

最低 最大
Minimum
Maximum
Vos 您

AC 高增益放大器输入- 参考偏移电压
AC High-Gain Amplifier Input-
Referred Offset Voltage

DSP 偏移移除 过滤器已禁用
DSP offset removal
filter disabled

输出偏移变化为 192 x 这个值（即， ).
Output offset varies by 192 x
this value (i.e., ).
CMRR

AC 高增益放大器 共模抑制比
AC High-Gain Amplifier
Common Mode Rejection Ratio

或 60 Hz
or 60 Hz
82
82
Typical 典型
PSRR

AC 高增益放大器功率 供应拒绝比
AC High-Gain Amplifier Power
Supply Rejection Ratio

或 60 Hz
or 60 Hz
75
75
Typical 典型

AC 高增益放大器 相声
AC High-Gain Amplifier
Crosstalk
to 10 kHz  到 10 千赫 -68

典型; 测量之间 芯片上相邻的放大器。
Typical; measured between
adjacent amplifiers on chip.

电极引脚偏置电流 (刺激器关闭)
Electrode Pin Bias Current
(Stimulator Off)
VSTIM-
VSTIM +
nA Individual elecX pin 个人电子 X 引脚
loREF

放大器参考输入偏置 当前
Amplifier Reference Input Bias
Current
VSTIM-
VSTIM +
nA

常见的放大器参考 (ref_elec pin)
Common amplifier reference
(ref_elec pin)

电极引脚输入 电容
Electrode Pin Input
Capacitance
10 pF Individual elecX pin 个人电子 X 引脚
CinREF

放大器参考输入 电容
Amplifier Reference Input
Capacitance
91 pF

常见的放大器参考 (ref_elec pin)
Common amplifier reference
(ref_elec pin)
Electrode Pin Input Impedance
电极引脚输入阻抗
1600
16
Individual elecX pin 个人电子 X 引脚
|ZinReF|

放大器参考输入 阻抗
Amplifier Reference Input
Impedance
170
1.7

常见的放大器参考 (ref_elec pin)
Common amplifier reference
(ref_elec pin)
Vni

AC 高增益放大器输入- 参考噪音
AC High-Gain Amplifier Input-
Referred Noise
2.4

典型。稍有变化（％3C 15％） 带放大器带宽。
Typical. Varies slightly (< 15%)
with amplifier bandwidth.
THD

AC 高增益放大器总计 谐波失真 （带有 )
AC High-Gain Amplifier Total
Harmonic Distortion
(with )
0.1
%

包括任何非线性 MUX。失真可能增加 附近 和 .
Includes any nonlinearity in
MUX. Distortion may increase
near and .

最大 ADC MUX 开关频率
Maximum ADC MUX
Switching Frequency
714 kHz 千赫兹

可以采样 16 个放大器 每个高达 44.6 kSamples/s。
16 amplifiers can be sampled
up to 44.6 kSamples/s each.
ISTIM Stimulation Current 刺激电流

当刺激器是 打开
When stimulator is
turned on
10
2.55
nA

最小震级 最大震级
Minimum magnitude
Maximum magnitude
IstiM-step Stimulation Current Step Size
刺激电流步长

8 位电流的 LSB- 输出 DAC
LSB of 8-bit current-
output DAC
10
10
nA Minimum magnitude 最小幅度

RHS2116 Digital Electrophysiology Stimulator/Amplifier Chip
RHS2116 数字电生理刺激器/放大器芯片

Electrical Characteristics
电气特性

unless otherwise noted.
除非另有说明。
SYMBOL PARAMETER CONDITIONS VALUE UNITS COMMENTS
Size of Packaged RHS2116 包装后的 RHS2116 尺寸

引脚塑料 QFN 封装 厚
pin plastic QFN package
thick
Mass of Packaged RHS2116 包装的 RHS2116 的质量 133 mg 毫克
Size of RHS2116 Bare Die
RHS2116 裸片的尺寸
4.74
Bare silicon die ( 0.20 mm thick
裸硅晶片（0.20 毫米厚
Mass of RHS2116 Bare Die
RHS2116 裸片的质量		 11 mg 毫克

Stimulator/Amplifier Block
刺激器/放大器模块

At the core of the RHS2116 chip is an array of 16 stimulator/amplifier blocks containing the circuitry modules illustrated in the diagram above. These modules perform three basic functions: (1) monitoring the AC and DC voltage on each electrode; (2) delivering constant-current stimulation pulses to the same electrode; and (3) recovering residual charge from the electrode following stimulation pulses. The circuits responsible for these tasks are listed here and described in more detail in the following pages.
RHS2116 芯片的核心是一个包含 16 个刺激器/放大器模块的阵列，其中包含上图所示的电路模块。这些模块执行三个基本功能：（1）监测每个电极上的交流和直流电压；（2）向同一电极提供恒定电流的刺激脉冲；以及（3）在刺激脉冲后从电极中恢复残留电荷。负责这些任务的电路在此列出，并在接下来的页面中进行更详细的描述。

AC-Coupled High-Gain Amplifier
交流耦合高增益放大器

Each channel has a high-gain amplifier with a band-pass response that senses electrophysiological signals (e.g., extracellular neural action potentials, local field potentials, electrocorticogram signals) within a range of and a typical noise floor of rms. The upper and lower cutoff frequencies of these amplifiers can be selected by registers. Two different mechanisms are provided for recovering quickly from large voltage artifacts caused by stimulation pulses. Unused amplifiers may be disabled to reduce power consumption. These amplifiers are sampled at 16-bit resolution by the on-chip ADC
每个通道都配备了一个带通响应的高增益放大器，用于感知生理信号（例如细胞外神经动作电位、局部场电位、脑皮层电信号）在 范围内，典型噪声电平为 rms。这些放大器的上限和下限截止频率可以通过寄存器选择。提供了两种不同的机制，用于快速恢复由刺激脉冲引起的大电压伪迹。未使用的放大器可以被禁用以减少功耗。这些放大器通过芯片上的 ADC 以 16 位分辨率进行采样。
The high-gain amplifiers are referenced to a common, shared pin (ref_elec) that can be connected to a lowimpedance reference electrode to reduce common-mode interference (e.g., 50/60 Hz line noise).
高增益放大器参考一个共同的、共享的引脚（ref_elec），可以连接到低阻抗参考电极，以减少共模干扰（例如 50/60 赫兹线噪声）。

DC-Coupled Low-Gain Amplifier
直流耦合低增益放大器

A second DC-coupled amplifier with a wide range (from VSTIM- + 1.2V to VSTIM+ -0.6 V ) can be used to monitor electrode potentials in response to stimulation pulses (e.g., to ensure that electrodes remain inside the "water window" to prevent chemical reactions from occurring). Unused amplifiers may be disabled to reduce power consumption. These amplifiers are sampled at 10-bit resolution by the onchip ADC.
第二个宽范围（从 VSTIM- + 1.2V 到 VSTIM+ -0.6V）的直流耦合放大器可用于监测电极电位对刺激脉冲的响应（例如，以确保电极保持在“水窗口”内，以防止化学反应发生）。未使用的放大器可以禁用以减少功耗。这些放大器通过芯片上的 ADC 以 10 位分辨率进行采样。

Stimulator Current Source and Sink
刺激器电流源和沉没

Constant-current stimulation can be delivered using an integrated current source and current sink. These circuits produce currents with user-specified magnitudes in the range of 10 nA to 2.55 mA . Each current source and sink is controlled by an 8-bit current-output DAC which has an 8-bit "trim" setting that can adjust the current by to compensate for variations between devices. The step size of the current-output DACs is set globally. Each stimulator has a built-in compliance monitor that sets a register bit if the electrode voltage becomes so high or low (i.e., close to VSTIM+ or VSTIM-) that it becomes impossible to deliver the specified current.
恒流刺激可以使用集成的电流源和电流汇进行传递。这些电路产生用户指定幅度范围在 10 nA 至 2.55 mA 之间的电流。每个电流源和电流汇由一个 8 位电流输出 DAC 控制，该 DAC 具有一个 8 位的“修剪”设置，可以通过 来调整电流，以补偿设备之间的差异。电流输出 DAC 的步进大小是全局设置的。每个刺激器都有一个内置的合规性监视器，如果电极电压变得过高或过低（即接近 VSTIM+或 VSTIM-），以至于无法传递指定的电流，则设置一个寄存器位。
All stimulators are disabled until the stim_en pin is pulled to VDD and a specific 32-bit code is programmed into the stim enable registers. This prevents random stimulation from occurring when the chip is first powered up.
所有刺激器在刺激引脚被拉到 VDD 并且特定的 32 位代码被编程到刺激使能寄存器之前都是禁用的。这可以防止芯片首次上电时发生随机刺激。

Charge Recovery Switch 充电恢复开关

Most stimulation protocols use charge-balanced pulses to avoid oxidation-reduction reactions at the electrode-tissue interface. Variations in transistor characteristics across a chip make it impossible to achieve perfect charge balance, so recovery circuits are included to bleed off residual charge after stimulation pulses. Each stimulator/amplifier block includes a charge recovery switch which can be used to briefly connect an electrode to a common stim_GND pin, which is typically tied to ground. This switch has an 'on' resistance on the order of .
大多数刺激协议使用平衡电荷的脉冲，以避免电极-组织界面的氧化还原反应。芯片上晶体管特性的变化使得完美的电荷平衡变得不可能，因此在刺激脉冲后包括恢复电路以释放残余电荷。每个刺激器/放大器块包括一个电荷恢复开关，可以用于短暂连接电极到一个通用的刺激_GND 引脚，通常与地线相连。这个开关的'开'电阻大约为 。

Current-Limited Charge Recovery Circuit
电流限制充电恢复电路

An alternate charge recovery circuit is included in each stimulator/amplifier block. The current-limited (CL) charge recovery circuit pulls the electrode toward a user-specified voltage with a small, programmable current ranging from 1 nA to . The target recovery voltage may be set in the range of . Some stimulation protocols initially hold the electrode at a slightly positive potential when using biphasic pulses that begin with a cathodic (negative) current. This issue is discussed in greater depth below.
每个刺激器/放大器块中都包含一个备用的充电恢复电路。 限流（CL）充电恢复电路使用从 1 nA 到 的小型可编程电流将电极拉向用户指定的电压。 目标恢复电压可以设置在 范围内。 一些刺激协议在使用以阴极（负）电流开始的双相脉冲时，最初将电极保持在略微正电位。 这个问题在下面更深入地讨论。

AC Amplifier Bandwidth AC 放大器带宽

Electrophysiological signals of interest are sensed by an array of AC-coupled low-noise amplifiers with integrated analog filters that can be configured to isolate frequencies of interest and minimize aliasing by attenuating signals above the Nyquist rate (i.e., half the ADC per-channel sampling rate). Each AC high-gain amplifier has a pass band extending from a low-frequency cutoff fi to a high-frequency cutoff . The upper end of the pass band has a 3rd-order Butterworth low-pass filter at the 3-dB frequency . The lower end of the pass band has a -order high-pass filter characteristic at the frequency fL .
感兴趣的电生理信号由一组交流耦合低噪声放大器感知，这些放大器带有集成模拟滤波器，可以配置为隔离感兴趣的频率并通过衰减超过奈奎斯特率（即每通道采样率的一半）的信号来最小化混叠。每个交流高增益放大器的通带从低频截止频率 fi 延伸到高频截止频率 。通带的上端具有一个 3 阶 Butterworth 低通滤波器，其 3dB 频率为 。通带的下端具有一个 阶高通滤波器特性，其频率为